EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 48

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

1–40
Table 1–30. Transceiver Block Jitter Specifications for Stratix IV GX Devices
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Deterministic Jitter
CPRI Receiver Jitter Tolerance
Total jitter tolerance
Deterministic jitter tolerance
Total jitter tolerance
Deterministic jitter tolerance
Combined deterministic and
random jitter tolerance
OBSAI Transmit Jitter Generation
Total jitter at 768 Mbps,
1536 Mbps, and 3072 Mbps
Deterministic jitter at
768 Mbps, 1536 Mbps, and
3072 Mbps
OBSAI Receiver Jitter Tolerance
Deterministic jitter tolerance
at 768 Mbps, 1536 Mbps,
and 3072 Mbps
Combined deterministic and
random jitter tolerance at
768 Mbps, 1536 Mbps, and
3072 Mbps
Sinusoidal Jitter tolerance at
768 Mbps
Description
Symbol/
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
REFCLK = 153.6MHz
Pattern = CJPAT
REFCLK = 153.6MHz
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Jitter Frequency =
5.4 KHz
Pattern = CJPAT
Jitter Frequency =
460 MHz to 20 MHz
Pattern = CJPAT
(17)
(18)
(18)
Conditions
Min
—
—
—
—
–2 Commercial
Speed Grade
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
> 0.4
> 8.5
> 0.1
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Typ
—
—
—
—
0.14
0.17
Max
0.35
0.17
Min
(Note
—
—
—
—
–2× Commercial
–3 Commercial/
Industrial and
Speed Grade
1),
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
Typ
> 0.4
> 8.5
> 0.1
—
—
—
—
(2)
Max
0.14
0.17
0.35
0.17
(Part 7 of 8)
April 2011 Altera Corporation
Min
Switching Characteristics
—
—
—
—
Industrial Speed
–4 Commercial/
Typ
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
Grade
—
—
—
—
> 0.4
> 8.5
> 0.1
Max
0.14
0.17
0.35
0.17
Unit
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI