EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 43
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EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Table 1–30. Transceiver Block Jitter Specifications for Stratix IV GX Devices
April 2011 Altera Corporation
Random jitter FC-1
Sinusoidal jitter FC-1
Deterministic jitter FC-2
Random jitter FC-2
Sinusoidal jitter FC-2
Deterministic jitter FC-4
Random jitter FC-4
Sinusoidal jitter FC-4
XAUI Transmit Jitter Generation
Total jitter at 3.125 Gbps
Deterministic jitter at
3.125 Gbps
XAUI Receiver Jitter Tolerance
Total jitter
Deterministic jitter
Peak-to-peak jitter
Peak-to-peak jitter
Peak-to-peak jitter
PCIe Transmit Jitter Generation
Total jitter at 2.5 Gbps
(Gen1)—×1, ×4, and ×8
Total jitter at 5 Gbps
(Gen2)—×1, ×4, and ×8
PCIe Receiver Jitter Tolerance
Total jitter at 2.5 Gbps
(Gen1)
Total jitter at 5 Gbps (Gen2)
PCIe (Gen 1) Electrical Idle Detect Threshold
V
(14)
RX-IDLE-DETDIFFp-p
Description
Symbol/
(15)
Pattern = CJTPAT
Fc/25000
Fc/1667
Pattern = CJTPAT
Pattern = CJTPAT
Fc/25000
Fc/1667
Pattern = CJTPAT
Pattern = CJTPAT
Fc/25000
Fc/1667
Pattern = CJPAT
Pattern = CJPAT
Jitter frequency =
22.1 KHz
Jitter frequency =
1.875 MHz
Jitter frequency =
20 MHz
Compliance pattern
Compliance pattern
Compliance pattern
Compliance pattern
Compliance pattern
(6)
(5)
(6)
(5)
Conditions
—
—
Min
—
—
—
—
65
–2 Commercial
Speed Grade
Compliant
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
> 0.31
> 0.33
> 0.29
> 0.33
> 0.29
> 0.65
> 0.37
> 0.6
Typ
> 1.5
> 0.1
> 1.5
> 0.1
> 1.5
> 0.1
> 8.5
> 0.1
> 0.1
—
—
—
—
—
Max
0.17
0.25
0.25
175
0.3
Min
(Note
—
—
—
—
65
–2× Commercial
–3 Commercial/
Industrial and
Speed Grade
Compliant
1),
> 0.31
> 0.33
> 0.29
> 0.33
> 0.29
> 0.65
> 0.37
Typ
> 1.5
> 0.1
> 1.5
> 0.1
> 1.5
> 0.1
> 8.5
> 0.1
> 0.1
> 0.6
—
—
—
—
—
(2)
Max
0.17
0.25
0.25
175
(Part 2 of 8)
0.3
Min
—
—
—
—
65
Industrial Speed
–4 Commercial/
Typ
> 0.31
> 0.33
> 0.29
> 0.33
> 0.29
> 0.65
> 0.37
Grade
—
—
—
—
—
> 1.5
> 0.1
> 1.5
> 0.1
> 1.5
> 0.1
> 8.5
> 0.1
> 0.1
> 0.6
—
Max
0.17
0.25
175
0.3
—
1–35
Unit
UI
UI
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