EP1S40B956C6 Altera, EP1S40B956C6 Datasheet - Page 145
![IC STRATIX FPGA 40K LE 956-BGA](/photos/6/73/67334/544-stratix_956-bga_sml.jpg)
EP1S40B956C6
Manufacturer Part Number
EP1S40B956C6
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S40B956C6
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1423
EP1S40SB956C6
EP1S40SB956C6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S40B956C6
Manufacturer:
ALTERA
Quantity:
260
Company:
Part Number:
EP1S40B956C6
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S40B956C6
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1S40B956C6N
Manufacturer:
ALTERA
Quantity:
229
Part Number:
EP1S40B956C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Altera Corporation
July 2005
EP1S10
EP1S20
Table 2–37. EP1S10, EP1S20 & EP1S25 Device Differential Channels (Part 1 of 2)
Device
484-pin FineLine BGA Transmitter
672-pin FineLine BGA
672-pin BGA
780-pin FineLine BGA Transmitter
484-pin FineLine BGA Transmitter
672-pin FineLine BGA
672-pin BGA
780-pin FineLine BGA Transmitter
Package
Table 2–37
EP1S10, EP1S20, and EP1S25 devices.
show this information for EP1S30, EP1S40, EP1S60, and EP1S80 devices.
Receiver
Transmitter
Receiver
Receiver
Receiver
Transmitter
Receiver
Receiver
Transmitter/
Receiver
shows the number of channels that each fast PLL can clock in
(2)
(2)
(2)
(2)
(2)
(2)
Channels
Total
20
20
36
36
44
44
24
20
48
50
66
66
Maximum
840
840
840
840
624
624
624
624
840
840
840
840
840
840
840
840
624
624
624
624
840
840
840
840
(Mbps)
Speed
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
(3)
Tables 2–38
Stratix Device Handbook, Volume 1
PLL 1
10
10
18
18
11
22
11
22
12
10
12
24
13
25
17
33
17
33
5
5
9
9
6
5
Center Fast PLLs
PLL 2
through
Note (1)
10
10
18
18
11
22
11
22
12
10
12
24
12
25
16
33
16
33
5
5
9
9
6
5
Stratix Architecture
PLL 3
Table 2–41
10
10
18
18
11
22
11
22
12
10
12
24
12
25
16
33
16
33
5
5
9
9
6
5
PLL 4
2–131
10
10
18
18
11
22
11
22
12
10
12
24
13
25
17
33
17
33
5
5
9
9
6
5
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