EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 4

• Manufacturer Part Number: EP2AGX65DF29I5N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29I5N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

1–4
Table 1–2. Package Options and I/O Information for Arria II GX Devices
Arria II Device Handbook Volume 1: Device Interfaces and Integration
EP2AGX45
EP2AGX65
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
Notes to
(1) The user I/O counts include clock pins.
(2) The arrows indicate packages vertical migration capability. Vertical migration allows you to migrate to devices whose dedicated pins, configuration pins,
(3) R
(4) RX = True LVDS input buffers without R
(5) TX = True LVDS output buffers.
(6) eTX = Emulated-LVDS output buffers, either LVDS_E_3R or LVDS_E_1R.
(7) The LVDS channel count does not include dedicated clock input pins and PLL clock output pins.
(8) These numbers represent the accumulated LVDS channels supported in Arria II GX row and column I/O banks.
Device
and power pins are the same for a given package across device densities.
D
= True LVDS input buffers with on-chip differential termination (R
Table
1–2:
156
156
I/O
—
—
—
—
358-Pin Flip Chip UBGA
17 mm × 17 mm
33(R
33(R
+ 32(RX, TX,
+ 32(RX, TX,
Table 1–2
counts, high-speed LVDS channel counts, and transceiver channel counts for Ultra
FineLine BGA (UBGA) and FineLine BGA (FBGA) devices.
LVDS
or eTX)
or eTX)
D
D
—
—
—
—
or eTX)
or eTX)
(8)
and
D
—
—
—
—
4
4
OCT support.
Table 1–3
252
252
260
260
I/O
—
—
572-Pin Flip Chip FBGA
25 mm × 25 mm
56(RX,TX, or
list the Arria II device package options and user I/O pin
56(RX, TX,
56(RX, TX,
56(RX, TX,
LVDS
57(R
57(R
57(R
57(R
or eTX)
or eTX)
or eTX)
eTX) +
eTX) +
eTX) +
eTX) +
eTX)
—
—
D
D
D
D
(8)
or
or
or
or
D
OCT) support.
—
—
8
8
8
8
364
364
372
372
372
372
I/O
780-Pin Flip Chip FBGA
(Note
29 mm × 29 mm
+84(RX, TX, or
+84(RX, TX, or
+84(RX, TX, or
85(R
85(R
85(R
85(R
+84(RX,TX, or
85(R
Chapter 1: Overview for the Arria II Device Family
+ 84(RX, TX,
85(R
+84(RX,TX,
1), (2),
LVDS
or eTX)
eTX)
eTX)
eTX)
eTX)
eTX)
D
D
D
D
D
D
or eTX)
or eTX)
or eTX)
or eTX)
or eTX)
, eTX)
(8)
(3), (4), (5), (6), (7)
December 2010 Altera Corporation
12
12
12
12
8
8
452
452
612
612
I/O
—
—
1152-Pin Flip Chip FBGA
Arria II Device Feature
35 mm × 35 mm
104(RX, TX, or
104(RX, TX, or
144(RX, TX, or
145(R
144(RX, TX, or
105(R
105(R
145(R
LVDS
eTX) +
eTX) +
eTX) +
eTX)
eTX)
eTX)
eTX)
—
—
D
, eTX) +
D
D
D
(8)
or
or
or
—
—
12
12
16
16