EPF10K50EQI240-2 Altera, EPF10K50EQI240-2 Datasheet - Page 39
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EPF10K50EQI240-2
Manufacturer Part Number
EPF10K50EQI240-2
Description
IC FLEX 10KE FPGA 50K 240-PQFP
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet
1.EPF10K30ETC144-3.pdf
(100 pages)
Specifications of EPF10K50EQI240-2
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
40960
Number Of I /o
189
Number Of Gates
199000
Voltage - Supply
2.3 V ~ 2.7 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 10KE
Number Of Usable Gates
50000
Number Of Logic Blocks/elements
2880
# Registers
189
# I/os (max)
189
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
2880
Ram Bits
40960
Device System Gates
199000
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
2.7V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1945
EPF10K50EQI240-2
EPF10K50EQI240-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K50EQI240-2
Manufacturer:
NEC
Quantity:
10
Company:
Part Number:
EPF10K50EQI240-2N
Manufacturer:
ALTERA22
Quantity:
209
Altera Corporation
ClockLock & ClockBoost Timing Parameters
For the ClockLock and ClockBoost circuitry to function properly, the
incoming clock must meet certain requirements. If these specifications are
not met, the circuitry may not lock onto the incoming clock, which
generates an erroneous clock within the device. The clock generated by
the ClockLock and ClockBoost circuitry must also meet certain
specifications. If the incoming clock meets these requirements during
configuration, the ClockLock and ClockBoost circuitry will lock onto the
clock during configuration. The circuit will be ready for use immediately
after configuration.
specifications.
Figure 19. Specifications for Incoming & Generated Clocks
The t
nominal output clock period.
ClockLock-
Generated
Clock
I
parameter refers to the nominal input clock period; the t
Input
Clock
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
t
R
t
OUTDUTY
t
Figure 19
CLK1
t
F
t
INDUTY
shows the incoming and generated clock
t
O
t
I
t
t
I
O +
t
INCLKSTB
t
JITTER
t
O –
t
JITTER
O
parameter refers to the
t
I
f
CLKDEV
39