EP3C40F324I7N Altera, EP3C40F324I7N Datasheet - Page 114
![IC CYCLONE III FPGA 40K 324 FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP3C40F324I7N
Manufacturer Part Number
EP3C40F324I7N
Description
IC CYCLONE III FPGA 40K 324 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C40F324I7N.pdf
(274 pages)
Specifications of EP3C40F324I7N
Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
195
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
39600
# I/os (max)
195
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
39600
Ram Bits
1161216
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2547
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C40F324I7N
Manufacturer:
ALTERA31
Quantity:
129
Part Number:
EP3C40F324I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP3C5F256C8N PDF datasheet
- EP3C5F256C8N PDF datasheet #2
- EP3C5F256C8N PDF datasheet #3
- EP3C5F256C8N PDF datasheet #4
- EP3C5F256C8N PDF datasheet #5
- EP3C40F324I7N PDF datasheet #6
- Current page: 114 of 274
- Download datasheet (6Mb)
6–14
Figure 6–6. Cyclone III Device Family HSTL I/O Standard Termination
Figure 6–7. Cyclone III Device Family SSTL I/O Standard Termination
Differential I/O Standard Termination
Cyclone III Device Handbook, Volume 1
Termination
Termination
and without
Calibration
On-Board
OCT with
External
Termination
and without
Termination
Calibration
OCT with
On-Board
External
Cyclone III Device
Family Series OCT
Transmitter
Differential I/O standards typically require a termination resistor between the two
signals at the receiver. The termination resistor must match the differential load
impedance of the bus
The Cyclone III device family supports differential SSTL-2 and SSTL-18, differential
HSTL-18, HSTL-15, and HSTL-12, PPDS, LVDS, RSDS, mini-LVDS, and differential
LVPECL.
Cyclone III Device
Family Series OCT
Transmitter
Transmitter
Transmitter
50
50
25
SSTL Class I
HSTL Class I
50
50
50
V REF
50
V REF
50
V REF
50
50
V REF
50
V TT
V TT
V TT
V TT
(Figure 6–8
Receiver
Receiver
Receiver
Receiver
and
Cyclone III Device
Family Series OCT
Figure
Cyclone III Device
Family Series OCT
Transmitter
Transmitter
Transmitter
Transmitter
25
25
Chapter 6: I/O Features in the Cyclone III Device Family
6–9).
V TT
V TT
25
50
HSTL Class II
50
SSTL Class II
50
50
V TT
V TT
50
50
V REF
© December 2009 Altera Corporation
50
50
V REF
Termination Scheme for I/O Standards
50
50
V TT
50
V REF
V REF
V TT
50
V TT
V TT
Receiver
Receiver
Receiver
Receiver
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