EP2SGX60EF1152C5N Altera, EP2SGX60EF1152C5N Datasheet - Page 229

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152C5N

Manufacturer Part Number
EP2SGX60EF1152C5N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152C5N

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
609.76MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2185

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Manufacturer
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0
Power
Consumption
Timing Model
Altera Corporation
June 2009
f
Altera offers two ways to calculate power for a design: the Excel-based
PowerPlay early power estimator power calculator and the Quartus
PowerPlay power analyzer feature.
The interactive Excel-based PowerPlay early power estimator is typically
used prior to designing the FPGA in order to get an estimate of device
power. The Quartus II PowerPlay power analyzer provides better quality
estimates based on the specifics of the design after place-and-route is
complete. The power analyzer can apply a combination of user-entered,
simulation-derived and estimated signal activities which, combined with
detailed circuit models, can yield very accurate power estimates.
In both cases, these calculations should only be used as an estimation of
power, not as a specification.
For more information on PowerPlay tools, refer to the
Power Estimators (EPE) and Power Analyzer,
Analysis and Optimization
chapter in volume 3 of the Quartus II Handbook. The PowerPlay early
power estimators are available on the Altera web site at
www.altera. com.
1
The DirectDrive technology and MultiTrack interconnect ensure
predictable performance, accurate simulation, and accurate timing
analysis across all Stratix II GX device densities and speed grades. This
section describes and specifies the performance, internal, external, and
PLL timing specifications.
All specifications are representative of worst-case supply voltage and
junction temperature conditions.
Preliminary and Final Timing
Timing models can have either preliminary or final status. The Quartus II
software issues an informational message during the design compilation
if the timing models are preliminary.
Stratix II GX device timing models.
Preliminary status means the timing model is subject to change. Initially,
timing numbers are created using simulation results, process data, and
other known parameters. These tests are used to make the preliminary
numbers as close to the actual timing parameters as possible.
See
Table 4–23 on page 42
Technology, and the
Stratix II GX Device Handbook, Volume 1
for typical I
Table 4–52
DC and Switching Characteristics
the
PowerPlay Power Analyzer
Quartus II PowerPlay
CC
shows the status of the
standby specifications.
PowerPlay Early
®
4–59
II

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