AT40K20-2EQC Atmel, AT40K20-2EQC Datasheet - Page 66

IC FPGA 20K GATES 240PQFP

AT40K20-2EQC

Manufacturer Part Number
AT40K20-2EQC
Description
IC FPGA 20K GATES 240PQFP
Manufacturer
Atmel
Series
AT40K/KLVr
Datasheets

Specifications of AT40K20-2EQC

Number Of Logic Elements/cells
1024
Total Ram Bits
8192
Number Of I /o
193
Number Of Gates
30000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
240-BFQFP
Family Name
AT40K
Number Of Usable Gates
30000
Number Of Logic Blocks/elements
1024
# Registers
1024
# I/os (max)
193
Process Technology
0.6um (CMOS)
Operating Supply Voltage (typ)
5V
Logic Cells
1024
Ram Bits
8192
Device System Gates
30000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
Lead Free Status / Rohs Status
Not Compliant
Other names
AT40K202EQC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT40K20-2EQC
Manufacturer:
Atmel
Quantity:
10 000
352C1 – SBGA
66
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing
A1 BALL CORNER
R
AT40K/AT40KLV Series FPGA
2. JEDEC variations are based on fully populated ball arrays. Arrays
A
2325 Orchard Parkway
San Jose, CA 95131
MO-192, Variation BAR-2, for additional information.
can be depopulated as desired by removing balls from the fully populated
array.
A1
E
A2
Top View
Side View
A1 BALL I.D.
D
TITLE
352C1, 352-ball, 35 x 35, Enhanced, Low-profile
Square Ball Grid Array Package (SBGA)
SEATING PLANE
b∅
e
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Section View
Matrix Size
SYMBOL
Bottom View
A1
A2
b
D
E
A
e
Die Side
COMMON DIMENSIONS
MIN
0.35
0.25
0.60
(Unit of Measure = mm)
35.0 BSC
35.0 BSC
1.27 BSC
26 x 26
NOM
e
0.75
AA
AB
AC
AD
AE
AF
W
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
Y
DRAWING NO.
A1 BALL
CORNER
352C1
MAX
1.70
1.10
0.90
0896C–FPGA–04/02
NOTE
3/29/02
REV.
A

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