AT40K20-2EQC Atmel, AT40K20-2EQC Datasheet - Page 62

• Manufacturer Part Number: AT40K20-2EQC
• Description: IC FPGA 20K GATES 240PQFP
• Manufacturer: Atmel
• Series: AT40K/KLVr

Specifications of AT40K20-2EQC

• Number Of Logic Elements/cells: 1024
• Total Ram Bits: 8192
• Number Of I /o: 193
• Number Of Gates: 30000
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 240-BFQFP
• Family Name: AT40K
• Number Of Usable Gates: 30000
• Number Of Logic Blocks/elements: 1024
• # Registers: 1024
• # I/os (max): 193
• Process Technology: 0.6um (CMOS)
• Operating Supply Voltage (typ): 5V
• Logic Cells: 1024
• Ram Bits: 8192
• Device System Gates: 30000
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Labs/clbs: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: AT40K202EQC

160Q1 – PQFP
62
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing
A1
R
AT40K/AT40KLV Series FPGA
2. To be determined at seating plane.
3. Regardless of the relative size of the upper and lower body sections,
4. Dimension b does not include Dambar protrusion. The Dambar
5. A1 is defined as the distance from the seating plane to the lowest point of
E1
2325 Orchard Parkway
San Jose, CA 95131
MS-022, Variation DD-1, for additional information.
dimensions D1 and E1 are determined at the largest feature of the body
exclusive of mold Flash and gate burrs, but including any mismatch
between the upper and lower sections of the molded body.
protrusion(s) shall not cause the lead width to exceed b maximum by more
than 0.08 mm. Dambar cannot be located on the lower radius or the lead
foot.
the package body.
A2
Side View
Top View
e
D1
b
TITLE
160Q1, 160-lead, 28 x 28 mm Body, 3.2 Form Opt.,
Plastic Quad Flat Pack (PQFP)
L1
SYMBOL
A1
A2
D
D1
E
E1
e
b
L1
Bottom View
0.25
3.20
0.22
COMMON DIMENSIONS
D
MIN
(Unit of Measure = mm)
31.20 BSC
28.00 BSC
31.20 BSC
28.00 BSC
0.65 BSC
1.60 REF
NOM
3.40
–
–
DRAWING NO.
160Q1
0.50
3.60
0.40
MAX
0896C–FPGA–04/02
E
NOTE
3/28/02
5
2
3
2
3
4
REV.
A