AT40K20-2EQC Atmel, AT40K20-2EQC Datasheet - Page 32

• Manufacturer Part Number: AT40K20-2EQC
• Description: IC FPGA 20K GATES 240PQFP
• Manufacturer: Atmel
• Series: AT40K/KLVr

Specifications of AT40K20-2EQC

• Number Of Logic Elements/cells: 1024
• Total Ram Bits: 8192
• Number Of I /o: 193
• Number Of Gates: 30000
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 240-BFQFP
• Family Name: AT40K
• Number Of Usable Gates: 30000
• Number Of Logic Blocks/elements: 1024
• # Registers: 1024
• # I/os (max): 193
• Process Technology: 0.6um (CMOS)
• Operating Supply Voltage (typ): 5V
• Logic Cells: 1024
• Ram Bits: 8192
• Device System Gates: 30000
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Labs/clbs: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: AT40K202EQC

DC Characteristics – 3.3V Operation Commercial/Industrial AT40KLV
Note:
32
Symbol
V
V
V
V
I
I
I
I
I
C
IH
IL
OZH
OZL
CC
IH
IL
OH
OL
IN
1. Parameter based on characterization and simulation; it is not tested in production.
AT40K/AT40KLV Series FPGA
High-level Input Voltage
Low-level Input Voltage
High-level Output Voltage
Low-level Output Voltage
High-level Input Current
Low-level Input Current
High-level Tri-state Output
Leakage Current
Low-level Tri-state Output
Leakage Current
Standby Current
Consumption
Input Capacitance
Parameter
CMOS
TTL
CMOS
TTL
I
V
I
V
I
V
I
V
I
V
I
V
V
With pull-down, V
V
With pull-up, V
Without pull-down,
V
With pull-down,
V
Without pull-up, V
With pull-up, V
Standby, unprogrammed
All pins
Conditions
OH
OH
OH
OL
OL
OL
CC
CC
CC
CC
CC
CC
IN
IN
IN
IN
= -4 mA
= -12 mA
= -16 mA
= 4 mA
= 12 mA
= 16 mA
= V
= V
= V
= V
= V
= 3.0V
= 3.0V
= 3.0V
= 3.0V
= 3.0V
CC
SS
CC
CC
CC
Maximum
Maximum
Maximum
Minimum
IN
IN
= V
= V
IN
IN
= V
= V
SS
SS
CC
SS
CON = -500 µA
TO -125 µA
Minimum
70% V
-300.0
-10.0
-10.0
75.0
75.0
-0.3
-0.3
2.0
2.1
2.1
2.1
CC
Typical
-150.0
-150.0
150.0
150.0
0.6
CON = -500 µA
TO -125 µA-
Maximum
30% V
300.0
300.0
-75.0
10.0
10.0
10.0
0.8
0.4
0.4
0.4
1.0
CC
0896C–FPGA–04/02
Units
mA
mA
µA
µA
µA
µA
µA
µA
µA
pF
V
V
V
V
V
V
V
V
V
V