EP2C8F256C8N Altera, EP2C8F256C8N Datasheet - Page 11

• Manufacturer Part Number: EP2C8F256C8N
• Description: IC CYCLONE II FPGA 8K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C8F256C8N

• Number Of Logic Elements/cells: 8256
• Number Of Labs/clbs: 516
• Total Ram Bits: 165888
• Number Of I /o: 182
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 8256
• # I/os (max): 182
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 8256
• Ram Bits: 165888
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1653

Referenced
Documents
Document
Revision History
Altera Corporation
February 2008
February 2008
v3.2
February 2007
v3.1
November 2005
v2.1
July 2005 v2.0
November 2004
v1.1
June 2004 v1.0
Table 1–5. Document Revision History
Document
Version
Date &
●
●
●
●
●
●
●
●
●
●
●
Added document to the Cyclone II Device Handbook.
Added
Updated
and
Added document revision history.
Added new
Updated Introduction and Features.
Updated
Updated technical content throughout.
Updated
Added
Updated
Updated bullet list in the
Table 1–4
“Referenced
Tables 1–3
This chapter references the following documents:
■
■
Table 1–5
“Features”
Table
Table
Table
Note (2)
Hot Socketing & Power-On Reset
Automotive-Grade Device Handbook
with information about EP2C5A.
1–3.
1–2.
1–2.
and 1–4.
Changes Made
shows the revision history for this document.
to
Documents”.
section and
Table
“Features”
1–2.
Table
section.
1–1,
Table
Cyclone II Device Handbook, Volume 1
chapter in Cyclone II Device Handbook
1–2,
Note to explain difference
between I/O pin count
information provided in
Table 1–2
software documentation.
Summary of Changes
and in the Quartus II
—
—
—
—
—
Introduction
1–9