EP2C8F256C8N Altera, EP2C8F256C8N Datasheet - Page 61
![IC CYCLONE II FPGA 8K 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP2C8F256C8N
Manufacturer Part Number
EP2C8F256C8N
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C8F256C8N
Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
8256
# I/os (max)
182
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
8256
Ram Bits
165888
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1653
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C8F256C8N
Manufacturer:
ALTBRA
Quantity:
77
Company:
Part Number:
EP2C8F256C8N
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP2C8F256C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C8F256C8NK
Manufacturer:
st
Quantity:
2
Altera Corporation
February 2007
Programmable Drive Strength
The output buffer for each Cyclone II device I/O pin has a programmable
drive strength control for certain I/O standards. The LVTTL, LVCMOS,
SSTL-2 class I and II, SSTL-18 class I and II, HSTL-18 class I and II, and
HSTL-1.5 class I and II standards have several levels of drive strength that
you can control. Using minimum settings provides signal slew rate
control to reduce system noise and signal overshoot.
the possible settings for the I/O standards with drive strength control.
LVTTL (3.3 V)
LVCMOS (3.3 V)
LVTTL/LVCMOS (2.5 V)
LVTTL/LVCMOS (1.8 V)
Table 2–16. Programmable Drive Strength (Part 1 of 2)
I/O Standard
Top & Bottom I/O Pins
I
OH
/I
12
16
20
24
12
16
20
24
12
16
10
12
OL
Cyclone II Device Handbook, Volume 1
4
8
4
8
4
8
2
4
6
8
Current Strength Setting (mA)
Cyclone II Architecture
Table 2–16
Side I/O Pins
Note (1)
12
16
20
24
12
10
12
4
8
4
8
4
8
2
4
6
8
shows
2–49