XC56309AG100A Freescale Semiconductor, XC56309AG100A Datasheet - Page 173
XC56309AG100A
Manufacturer Part Number
XC56309AG100A
Description
IC DSP 24BIT 100MHZ 144-TQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet
1.XC56309AG100A.pdf
(284 pages)
Specifications of XC56309AG100A
Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 8-1 illustrates how each type of reset affects each register in the SCI.
Freescale Semiconductor
SRSH
HW
SW
IR
ST
1
0
—
Register
SCCR
SRSH
STSH
SCR
SSR
SRX
STX
causing the SCI Status Register (SSR) to be reset. No other SCI registers are affected by
the STOP instruction.
SCI receive shift register, STSH—SCI transmit shift register
Hardware reset is caused by asserting the external RESET signal.
Software reset is caused by executing the RESET instruction.
Individual reset is caused by clearing PCRE (bits 0–2) (configured for GPIO).
Stop reset is caused by executing the STOP instruction.
The bit is set during this reset.
The bit is cleared during this reset.
The bit is not changed during this reset.
Bit Mnemonic
SRX[23–0]
STX[23–0]
WDS[2–0]
SRS[8–0]
CD[11–0]
STS[8–0]
WOMS
SSFTD
WAKE
RDRF
SCKP
TDRE
TRNE
TMIE
RWU
REIE
STIR
IDLE
RCM
COD
TCM
SBK
SCP
ILIE
TIE
RIE
OR
RE
PE
TE
R8
FE
Table 8-1. SCI Registers After Reset
DSP56309 User’s Manual, Rev. 1
23–16, 15–8, 7–0
Bit Number
11–0
23–0
2–0
8–0
8–0
16
15
14
13
12
11
10
15
14
13
12
9
8
7
6
5
4
3
7
6
5
4
3
2
1
0
HW Reset
—
—
—
—
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
SW Reset
—
—
—
—
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
Reset Type
IR Reset
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
1
1
SCI After Reset
ST Reset
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
1
1
–
8-5
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