ADSP-BF527KBCZ-6C2 Analog Devices Inc, ADSP-BF527KBCZ-6C2 Datasheet - Page 55

• Manufacturer Part Number: ADSP-BF527KBCZ-6C2
• Description: IC DSP 16BIT 600MHZ 289CSPBGA
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF527KBCZ-6C2

• Package / Case: 289-CSPBGA
• Interface: DMA, Ethernet, I²C, PPI, SPI, SPORT, UART, USB
• Clock Rate: 600MHz
• Non-volatile Memory: ROM (32 kB)
• On-chip Ram: 132kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.10V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Svhc: No SVHC (18-Jun-2010)
• Cache On Chip L1/l2 Memory: 48KB
• Core Frequency Typ: 600MHz
• Dsp Type: Core
• External Supported Memory: SDRAM, SRAM, FLASH, ROM
• Interface Type: SPI, Parallel, 2 Wire
• Rohs Compliant: Yes
• Mmac: 1200
• No. Of Pins: 289
• Package: 289CSP-BGA
• Maximum Speed: 600 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BF527-MPSKIT - BOARD EVAL MEDIA PLAYER BF527ADZS-BF527-EZLITE - BOARD EVAL ADSP-BF527
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 45. Serial Ports—Enable and Three-State
1
Parameter
Switching Characteristics
t
t
t
t
Referenced to drive edge.
DTENE
DDTTE
DTENI
DDTTI
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Data Enable Delay from External
TSCLKx
Data Disable Delay from External
TSCLKx
Data Enable Delay from Internal
TSCLKx
Data Disable Delay from Internal
TSCLKx
1
1
1
1
TSCLKx
DTx
DRIVE EDGE
Min
0.0
–2.0
Figure 26. Serial Ports — Enable and Three-State
1.8V Nominal
ADSP-BF522/ADSP-BF524/
Rev. B | Page 55 of 88 | May 2010
V
DDEXT
Max
t
t
SCLK
SCLK
t
ADSP-BF526
DTENE/I
+1
+1
Min
0.0
–2.0
2.5/3.3V Nominal
V
DDEXT
DRIVE EDGE
Max
t
t
SCLK
SCLK
+1
+1
Min
0.0
–2.0
t
DDTTE/I
1.8V Nominal
ADSP-BF523/ADSP-BF525/
V
DDEXT
Max
t
t
SCLK
SCLK
ADSP-BF527
+1
+1
Min
0.0
–2.0
2.5/3.3V Nominal
V
DDEXT
Max
t
t
SCLK
SCLK
+1
+1
Unit
ns
ns
ns
ns