DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 23

IC DSP 24BIT AUD 120MHZ 144-LQFP

DSPB56362AG120

Manufacturer Part Number
DSPB56362AG120
Description
IC DSP 24BIT AUD 120MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56362AG120

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
120MHz
Non-volatile Memory
ROM (126 kB)
On-chip Ram
42kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Architecture
Modified Harvard
Format
Fixed Point
Clock Freq (max)
120MHz
Mips
120
Device Input Clock Speed
120MHz
Ram Size
42KB
Program Memory Size
90KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.14V
Operating Supply Voltage (max)
3.46V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Product
DSPs
Data Bus Width
24 bit
Processor Series
DSP563xx
Core
56000
Numeric And Arithmetic Format
Fixed-Point
Instruction Set Architecture
Modified Harvard
Device Million Instructions Per Second
120 MIPS
Maximum Clock Frequency
120 MHz
Program Memory Type
Flash
Data Ram Size
42 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SPI, I2C, ESAI, SHI
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Signal
Name
SCKR
SDO5
SCKT
SDI0
PC4
PC0
PC3
PC6
FST
Input, Output, or
Input, Output, or
Input, Output, or
Input, Output, or
Input or Output
Input or Output
Input or Output
Disconnected
Disconnected
Disconnected
Disconnected
Signal Type
Output
Input
Table 2-11 Enhanced Serial Audio Interface Signals (continued)
State during Reset
GPIO Disconnected Frame Sync for Transmitter—This is the transmitter frame sync
GPIO Disconnected Receiver Serial Clock—SCKR provides the receiver serial bit clock
GPIO Disconnected Transmitter Serial Clock—This signal provides the serial bit rate
GPIO Disconnected Serial Data Output 5—When programmed as a transmitter, SDO5 is
DSP56362 Technical Data, Rev. 4
input/output signal. For synchronous mode, this signal is the frame
sync for both transmitters and receivers. For asynchronous mode, FST
is the frame sync for the transmitters only. The direction is determined
by the transmitter frame sync direction (TFSD) bit in the ESAI transmit
clock control register (TCCR).
Port C 4—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
for the ESAI. The SCKR operates as a clock input or output used by
all the enabled receivers in the asynchronous mode (SYN=0), or as
serial flag 0 pin in the synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is
determined by the RCKD bit in the RCCR register. When configured
as the output flag OF0, this pin will reflect the value of the OF0 bit in
the SAICR register, and the data in the OF0 bit will show up at the pin
synchronized to the frame sync in normal mode or the slot in network
mode. When configured as the input flag IF0, the data value at the pin
will be stored in the IF0 bit in the SAISR register, synchronized by the
frame sync in normal mode or the slot in network mode.
Port C 0—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
clock for the ESAI. SCKT is a clock input or output used by all enabled
transmitters and receivers in synchronous mode, or by all enabled
transmitters in asynchronous mode.
Port C 3—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
used to transmit data from the TX5 serial transmit shift register.
Serial Data Input 0—When programmed as a receiver, SDI0 is used
to receive serial data into the RX0 serial receive shift register.
Port C 6—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
Enhanced Serial Audio Interface
2-17

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