DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 17

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Signal Name
HWR/HWR
HRD/HRD
HDS/HDS
PB10
HRW
PB11
PB12
HA2
HA9
Input, Output, or
Input, Output, or
Input, Output, or
Disconnected
Disconnected
Disconnected
Type
Input
Input
Input
Input
Input
Input
State during Reset
GPIO Disconnected Host Address Input 2—When the HDI08 is programmed to
GPIO Disconnected Host Read/Write—When HDI08 is programmed to interface a
GPIO Disconnected Host Data Strobe—When HDI08 is programmed to interface a
Table 2-9 Host Interface (continued)
DSP56362 Technical Data, Rev. 4
interface a non-multiplexed host bus and the HI function is
selected, this signal is line 2 of the host address (HA2) input bus.
Host Address 9—When HDI08 is programmed to interface a
multiplexed host bus and the HI function is selected, this signal
is line 9 of the host address (HA9) input bus.
Port B 10—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
single-data-strobe host bus and the HI function is selected, this
signal is the Host Read/Write (HRW) input.
Host Read Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host read data strobe (HRD) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HRD) after reset.
Port B 11—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
single-data-strobe host bus and the HI function is selected, this
signal is the host data strobe (HDS) Schmitt-trigger input. The
polarity of the data strobe is programmable, but is configured as
active-low (HDS) following reset.
Host Write Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host write data strobe (HWR) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HWR) following reset.
Port B 12—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
Host Interface (HDI08)
2-11