PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 83

• Manufacturer Part Number: PPC460EX-SUB800N
• Manufacturer: AMCC

Revision 1.19 – June 17, 2009
Figure 4. Timing Waveform
Spread Spectrum Clocking
Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC460EX. This controller
uses a PLL for clock generation inside the chip. The accuracy with which the PLL follows the SSCG is referred to
as tracking skew. The PLL bandwidth and phase angle determine how much tracking skew there is between the
SSCG and the PLL for a given frequency deviation and modulation frequency. When using an SSCG with the
PPC460EX the following conditions must be met:
Notes:
Important: It is up to the system designer to ensure that any SSCG used with the PPC460EX meets the above
AMCC Proprietary
Preliminary Data Sheet
• The frequency deviation must not violate the minimum clock cycle time. Therefore, when operating the
• The maximum frequency deviation of SysClk cannot exceed − 1%, and the modulation frequency cannot
• For the PCI Express Reference Clock, the maximum spread spectrum is − 0.5%, modulated between 30kHz
PPC460EX with one or more internal clocks at their maximum supported frequency, the SSCG can only lower
the frequency.
exceed 40kHz. In some cases, on-board PPC460EX peripherals impose more stringent requirements.
and 33kHz. The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million
(ppm) of each other at all times. This is specified to allow bit rate clock sources with a ± 300ppm tolerance.
1. The serial port baud rates are synchronous to the modulated clock. The serial port has a tolerance of
2. Ethernet operation is unaffected.
3. IIC operation is unaffected.
approximately 1.5% on baud rate before framing errors begin to occur. The 1.5% tolerance assumes that
the connected device is running at precise baud rates.
requirements and does not adversely affect other aspects of the system.
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460EX – PPC460EX Embedded Processor
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