EVAL-ADV7314EB Analog Devices Inc, EVAL-ADV7314EB Datasheet - Page 31

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EVAL-ADV7314EB

Manufacturer Part Number
EVAL-ADV7314EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADV7314EB

Lead Free Status / Rohs Status
Not Compliant
INPUT CONFIGURATION
When 10-bit input data is applied, the following bits must be
set to 1:
Address 0x7C, Bit 1 (Global 10-Bit Enable)
Address 0x13, Bit 2 (HD 10-Bit Enable)
Address 0x48, Bit 4 (SD 10-Bit Enable)
Note that the ADV7314 defaults to simultaneous standard
definition and progressive scan on power-up. Address[01h]:
Input Mode = 011.
Standard Definition Only
Address [01h] Input Mode = 000
The 8-bit/10-bit multiplexed input data is input on Pins S9–S0
(or Y9–Y0, depending on Register Address 0x01, Bit7), with S0
being the LSB in 10-bit input mode. Input standards supported
are ITU-R BT.601/656.
In 16-bit input mode, the Y pixel data is input on Pins S9–S2,
and CrCb data is input on Pins C9–C2. The 27 MHz clock
input must be input on the CLKIN_A pin.
Input sync signals are optional and are input on the S_VSYNC,
S_ HSYNC, and S_BLANK pins.
REV. 0
Figure 21 . SD Only Input Mode
*Selected by Address 0x01 Bit 7
DECODER
MPEG2
YCrCb
27MHz
10
3
S_VSYNC
S_HSYNC
S_BLANK
CLKIN_A
S[9:0] or Y[9:0]*
ADV7314
–31–
Progressive Scan Only or HDTV Only
Address [01h] Input Mode 001 or 010, Respectively
YCrCb Progressive Scan, HDTV, or any other HD YCrCb data
can be input in 4:2:2 or 4:4:4. In 4:2:2 input mode, the Y data
is input on Pins Y9–Y0 and the CrCb data on Pins C9–C0. In
4:4:4 input mode, Y data is input on Pins Y9–Y0, Cb data on
Pins C9–C0, and Cr data on Pins S9–S0.
If the YCrCb data does not conform to SMPTE 293M (525p),
ITU-R BT.1358M (625p), SMPTE 274M (1080i), SMPTE
296M (720p), or BTA T-1004/1362, the async timing mode must
be used.
RGB data can be input in 4:4:4 format in PS Input mode only
or in HDTV Input mode only when HD RGB input is enabled.
G data is input on Pins Y9–Y0, R data on S9–S0, and B data
on C9–C0.
The clock signal must be input on the CLKIN_A pin.
Figure 22. Progressive Scan Input Mode
PROGRESSIVE
DECODER
INTERLACED
MPEG2
YCrCb
TO
Cb
Cr
Y
27MHz
10
10
10
3
CLKIN_A
C[9:0]
S[9:0]
Y[9:0]
P_VSYNC
P_HSYNC
P_BLANK
ADV7314
ADV7314