PCI-BOARD/S25 Altera, PCI-BOARD/S25 Datasheet - Page 12

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PCI-BOARD/S25

Manufacturer Part Number
PCI-BOARD/S25
Description
Manufacturer
Altera
Datasheet

Specifications of PCI-BOARD/S25

Lead Free Status / Rohs Status
Supplier Unconfirmed
Stratix PCI Development Board Data Sheet
12
Switch S1 Position 9
Table 8. Configuration Image Selection
(MPGM1) Setting
Board Settings Dip Switch Bank
Off
Off
On
On
f
Switch S1 Position 10
(MPGM0) Setting
When the MAX configuration controller is not configuring the Stratix
device, it releases control of the flash memory to the Stratix device. At that
point, the Stratix device can perform read or write operations on the flash
memory. Reading, erasing, and writing to the flash memory requires a
flash memory controller designed into the Stratix device that meets the
strict interface and timing requirements of the flash memory device. Refer
to the MAX configuration controller and PCI-to-DDR SDRAM memory
reference designs for sample designs that illustrate the required circuitry
for the flash memory interface.
The size of the flash memory device used on the board and the factory
programmed MAX configuration controller are designed to partition the
flash memory into several sectors that contain different Stratix device
configuration images. The board settings dip switch bank (S1) has two
postions (9 and 10) used to select the configuration image for configuring
the Stratix device. See
Refer to the PCI High-Speed Development Kit, Stratix Professional Edition
Getting Started User Guide for more details on the flash memory map for
configuration images and general-purpose user data.
Off
On
Off
On
Factory-programmed image
User image 1
User image 2
User image 3
Table 8
Starter Board
for more details.
Configuration Image
Factory-programmed image
User image 1
Factory-programmed image
User image 1
Professional Board
Altera Corporation