PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 63
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PEF82902FV11XP
Manufacturer Part Number
PEF82902FV11XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF82902FV11XP.pdf
(205 pages)
Specifications of PEF82902FV11XP
Lead Free Status / Rohs Status
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2.3.5
The upstream D-channel is arbitrated between the S-bus and external HDLC controllers
via the TIC bus (S/G, BAC, TBA bits) according to the IOM
Further to the implementation in the INTC-Q it is possible, to set the priority (8 or 10) of
all HDLC-controllers connected to IOM
SMINT
2.3.5.1
Figure 26
between the S-bus and the microcontroller.
•
Figure 26
1)
Data Sheet
The A/B-bit is not supported by the U-transceiver
D
â
I together with the UTAH.
E-Bit
and
D-Channel Access Control
Application Examples for D-Channel Access Control
D-Channel Arbitration: C with HDLC and Direct Access to TIC Bus
Figure 27
T-SMINT
S
Arbitr.
IOM-2 i/f
show different scenarios for the local D-channel arbitration
Prio
IOM-2
â
I
S/G
BAC
BAC
S/G
HDLC
µP - i/f
HDLC
e.g. UTAH;
â
HDLC
MPC860
-2, which is particularly useful for use of the T-
HDLC
51
µC
U
•µC has access to BAC-Bit
and S/G-bit on IOM-2.
•Access to TBA generally not
required if only one local D-channel
source.
Functional Description
â
-2 Reference Guide
D
PEF 82902
2001-11-09
1)
.
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