PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 162

• Manufacturer Part Number: PEF82902FV11XP
• Manufacturer: Lantiq

Specifications of PEF82902FV11XP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

For all interrupts in the STI register the following logical states are applied
STOVxy
STIxy
Note: ST0Vxy and ACKxy are useful for synchronizing microcontroller accesses and
4.7.12
ASTI
Value after reset: 00
ACKxy
Data Sheet
receive/transmit operations. One BCL clock is equivalent to two DCL clocks.
7
0
ASTI - Acknowledge Synchronous Transfer Interrupt
0 =
1 =
Synchronous Transfer Overflow Interrupt
Enabled STOV interrupts for a certain STIxy interrupt are generated when
the STIxy has not been acknowledged in time via the ACKxy bit in the ASTI
register. This must be one (for DPS = ‘0’) or zero (for DPS = ‘1’) BCL clock
cycles before the time slot which is selected for the STOV.
Synchronous Transfer Interrupt
Depending on the DPS bit in the corresponding TSDPxy register the
Synchronous Transfer Interrupt STIxy is generated two (for DPS = ‘0’) or
one (for DPS = ‘1’) BCL clock cycles after the selected time slot
(TSDPxy.TSS).
Acknowledge Synchronous Transfer Interrupt
After a STIxy interrupt the microcontroller has to acknowledge the interrupt
by setting the corresponding ACKxy bit.
0 =
1 =
No activity is initiated
Sets the acknowledge bit ACKxy for a STIxy interrupt
0
Interrupt has not occurred
Interrupt has occurred
H
0
0
write
150
ACK21
ACK20
Register Description
ACK11
Address:
PEF 82902
2001-11-09
ACK10
0
58
H