PEB20570FV31XP Infineon Technologies, PEB20570FV31XP Datasheet - Page 117

• Manufacturer Part Number: PEB20570FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20570FV31XP

• Lead Free Status / Rohs Status: Compliant

4.3.2.5
The IOMU may support different serial data rates of the IOM-2 interface:
• 384 kbit/s (6 time slots per frame)
• 768 kbit/s (12 time slots per frame)
• 2.048 Mbit/s (32 time slots per frame = 8 IOM-2 channels per frame)
• 4.096 Mbit/s (64 time slots per frame = 16 IOM-2 channels per frame)
The IOMU circular buffer may handle up to 64 time slots per frame. Thus, when in 4.096
Mbit/s mode, only IOM-2 port 0 is used. In this case IOM-2 port 1 remains in IDLE mode,
i.e. the DD1 output pin is tri-stated.
Table 32
Single/Double
Rate DCL Mode
Single
Double
The IOMU meets the IOM-2 interface timing specifications as described below.
Single Data Rate DCL Mode
• Serial transmission via DD0/DD1 with every DCL rising edge
• Sampling of the incoming serial data (DU0/DU1) with every DCL falling edge
• Sampling FSC with every DCL falling edge. Sampling of FSC = 1 after sampling of
Double Data Rate DCL Mode
• Two DCL cycles per bit (the bits are aligned to the frame start)
• Serial transmission via DU0/1 with every second DCL rising edge.
• Sampling of incoming serial data (DD0/1) with the second DCL falling edge of each bit.
• Sampling of FSC every DCL falling edge. Sampling of FSC = 1 after sampling of
Figure 36
Data Sheet
FSC = 0 is considered to be the start of a frame.
FSC = 0, is considered to be the start of a new frame.
shows the IOM-2 interface timing with single and double rate DCL.
IOM-2 Interface Data Rate Modes
DCL Frequency in Different IOM-2 Modes
1x384 kbit/s
384 kHz
768 kHz
1x768 kbit/s
1536 kHz
768 kHz
100
IOM-2 Mode
2x2.048 Mbit/s 1x4.096 Mbit/s
2.048 MHz
4.096 MHz
Functional Description
4.096 MHz
PEB 20570
PEB 20571
2003-07-31
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