QST108KT6 STMicroelectronics, QST108KT6 Datasheet - Page 14

• Manufacturer Part Number: QST108KT6
• Manufacturer: STMicroelectronics

Specifications of QST108KT6

• Lead Free Status / Rohs Status: Compliant

Device operating modes
Caution:
4.4
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●
●
If an I
does not acknowledge the frame (even if it has an I
host must therefore send again the frame until it is taken in account and acknowledged.
Mode selection
The device options are configured by connecting pull-up or pull-down resistors on OPTn
pins. The device operating mode is selected using option pin 1 (OPT1) while the device
settings are configured using option pins OPT2 to OPT6
at power-up and after a reset.
To fit most applications, the QST108 device offers two different operating modes:
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●
Table 3.
Pin OPT1 is high at start-up Stand-alone mode
Pin OPT1 is low at start-up
Free run in detect
The behavior in this mode is the same as in the standard low power mode except that
the sleep window insertion is always skipped if any of the active keys is detected as
touched.
This is useful to improve the wheel response time.
Deep Sleep mode
In Deep Sleep mode, the device enters a very low power mode indefinitely. The device
resumes its operations after receiving an I
Stand-alone mode
This mode allows the user to simply replace existing mechanical switches with a
capacitive sensing solution. It is designed for maximum flexibility and can
accommodate most popular sensing requirements via option resistors (AKS, Low
power, Max On-Duration and output modes).
In this mode, the 8 output pins reflect the status of the 8 sensing channels.
I
In this mode, which is the most open one, the device is driven using the I
To avoid polling, the QST device features an output interrupt pin (IRQ). The IRQ line
reports all key changes to the Master device. The QST (Slave) device can drive up to
five general-purpose outputs.
2
2
C mode
C frame is received while in Sleep or Deep Sleep mode, the device wakes up but
Operating modes
OPT1: Mode selection
I
2
C mode
2
C frame with any address or a reset.
OPT2
ADD0
AKS
2
C frame with the device address). The
(Table
Option resistor function
OPT3
ADD1
LP
3). Option pins are sampled
MOD_0 MOD_1
ADD2
OPT4
Unused Unused
OPT5
2
C interface.
QST108
OPT6
OM