QST108KT6 STMicroelectronics, QST108KT6 Datasheet - Page 13

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QST108KT6

Manufacturer Part Number
QST108KT6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of QST108KT6

Lead Free Status / Rohs Status
Compliant
QST108
4
4.1
4.2
4.3
Device operating modes
Reset and power-up
At power-up, the device configures itself according to the pull-up or pull-down option
resistors present on pins OPT1 to OPT6. The device start-up and configuration may take up
to t
When the power is established, it is possible to force a new device configuration by applying
a negative pulse on the RESET pin.
The RESET pin is a bidirectional pin with an internal pull-up. The line is forced low when the
device resets itself (through an I²C command, for example).
A 10nF capacitor is recommended on the RESET pin to ensure reliable start-up and noise
immunity.
Burst operation
The device operates in “Burst” mode. Each key touch is acquired using a burst of charge-
transfer sensing pulses whose count varies depending on the value of the sense capacitor
C
pulses:
Bursts always operate in an A-B sequence. If Keys 5 to 8 are not implemented, the QST
device will not perform the Burst B to improve the response time and reduce the power
consumption when in Low Power (LP) mode.
In Low Power mode, the device sleeps in an ultra-low current state between bursts to
conserve power.
Low power mode
In order to reduce the device power consumption, the QST family include scalable low
power modes.
S
Setup
and the load capacitance C
Burst A: Keys 1, 2, 3, and 4
Burst B: Keys 5, 6, 7, and 8
Standard low power mode
When the device is in standard low power mode, a window with very low power
consumption is inserted between the acquisition of the last active key and the following
acquisition of the first active key.
This window duration is programmable as the 'sleep duration time'.
Note that the sleep window insertion is cancelled in the following conditions:
.
If a change is detected on a key, in order to speed up the DI process, the sleep
window insertion is skipped until the end of the DI process.
In I
pulse on the IRQ pin. In this case, the low power mode is disabled until a
command is received from the host.
Inside an I
period is skipped.
2
C mode, when a key change is actually detected and reported with a negative
2
C command, between the Write and the Read I
X
. Key touches are acquired using two successive bursts of
Device operating modes
2
C frames, the sleep
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