ADMCF328BRZ Analog Devices Inc, ADMCF328BRZ Datasheet - Page 20

• Manufacturer Part Number: ADMCF328BRZ
• Manufacturer: Analog Devices Inc

Specifications of ADMCF328BRZ

• Operating Current: 123mA
• Operating Temperature Classification: Industrial
• Package Type: SOIC W
• Operating Supply Voltage (min): -0.3V
• Operating Supply Voltage (max): 7V
• Lead Free Status / Rohs Status: Compliant

ADMCF328
The auxiliary PWM system of the ADMCF328 can operate in
two different modes: independent mode or offset mode. The
operating mode of the auxiliary PWM system is controlled
by Bit 8 of the MODECTRL register. Setting Bit 8 of the
MODECTRL register places the auxiliary PWM system in the
independent mode. In this mode, the two auxiliary PWM genera-
tors are completely independent and separate switching
frequencies and duty cycles may be programmed for each aux-
iliary PWM output. In this mode, the 8-bit AUXTM0 register
sets the switching frequency of the signal at the AUX0 output
pin. Similarly, the 8-bit AUXTM1 register sets the switching
frequency of the signal at the AUX1 pin. The fundamental time
increment for the auxiliary PWM outputs is twice the DSP
instruction rate (or 2 t
periods are given by:
Since the values in both AUXTM0 and AUXTM1 can range from
0 to 0xFF, the achievable switching frequency of the auxiliary PWM
signals may range from 39.1 kHz to 10 MHz for a CLKOUT
frequency of 20 MHz.
The on-time of the two auxiliary PWM signals is programmed by
the two 8-bit AUXCH0 and AUXCH1 registers, according to:
so that output duty cycles from 0% to 100% are possible. Duty
cycles of 100% are produced if the on-time value exceeds the
period value. Typical auxiliary PWM waveforms in independent
mode are shown in Figure 18(a). When Bit 8 of the MODECTRL
register is cleared, the auxiliary PWM channels are placed in offset
mode. In offset mode, the switching frequency of the two signals
on the AUX0 and AUX1 pins are identical and controlled by
AUXTM0 in a manner similar to that previously described for
independent mode. In addition, the on times of both the AUX0
and AUX1 signals are controlled by the AUXCH0 and AUXCH1
registers as before. However, in this mode the AUXTM1 register
defines the offset time from the rising edge of the signal on the
AUX0 pin to that on the AUX1 pin according to:
PWMSYNC
V
I
WINDING
WINDING
I
BUS
LOWER TRANSISTOR
CONDUCTION
T
T
T
T
T
OFFSET
Figure 17. Bus Current Signals
ON
ON
AUX
AUX
,
,
AUX
AUX
0
1
= ×
= ×
= ×
CK
2
2
0
1
2
= ×
= ×
CONDUCTION
) and the corresponding switching
2
2
(
(
UPPER
(
DIODE
AUXTM
AUXTM
AUXTM
(
(
AUXTM
AUXTM
LOWER TRANSISTOR
1 1
0 1
CONDUCTION
1 1
+
+
+
1
0
)
)
)
)
)
×
×
×
×
×
t
t
t
CK
t
CK
t
CK
CK
CK
t
t
t
t
–20–
For correct operation in this mode, the value written to the
AUXTM1 register must be less than the value written to the
AUXTM0 register. Typical auxiliary PWM waveforms in offset
mode are shown in Figure 18(b). Again, duty cycles from 0% to
100% are possible in this mode.
In both operating modes, the resolution of the auxiliary PWM
system is eight bits only at the minimum switching frequency
(AUXTM0 = AUXTM1 = 255 in independent mode, AUXTM0
= 255 in offset mode). Obviously, as the switching frequency is
increased, the resolution is reduced.
Values can be written to the auxiliary PWM registers at any
time. However, new duty cycle values written to the AUXCH0 and
AUXCH1 registers only become effective at the start of the next
cycle. Writing to the AUXTM0 or AUXTM1 registers causes
the internal timers to be reset to 0 and new PWM cycles to begin.
By default following a reset, Bit 8 of the MODECTRL register
is cleared, thus enabling offset mode. In addition, the registers
AUXTM0 and AUXTM1 default to 0xFF, corresponding to
the minimum switching frequency and zero offset. The on-time
registers AUXCH0 and AUXCH1 default to 0x00.
Auxiliary PWM Interface, Registers, and Pins
The registers of the auxiliary PWM system are summarized at
the end of the data sheet.
PWM DAC Equation
The auxiliary PWM output can be filtered in order to produce a low
frequency analog signal between 0 V to V
filter with a 1.2 kHz cutoff frequency will sufficiently attenuate the
PWM carrier. Figure 19 shows how the filter would be applied.
Figure 18. Typical Auxiliary PWM Signals. (All Times in
Increments of t
AUX0
AUX1
AUX0
AUX1
2
(AUXTM1 + 1)
Figure 19. Auxiliary PWM Output Filter
AUXPWM
2
2
AUXCH0
AUXCH0
CK
)
(a) Independent Mode
(b) Offset Mode
2
R1
AUXCH1
2
2
AUXCH1
(AUXTM0 + 1)
C1
2
R2
2
(AUXTM0 + 1)
(AUXTM0 + 1)
2
C2
DD
R1 = R2 = 13k
C1 = C2 = 10nF
. For example, a 2-pole
(AUXTM1 + 1)
2
AUXCH1
REV. A