AD9763ASTZ Analog Devices Inc, AD9763ASTZ Datasheet - Page 11

• Manufacturer Part Number: AD9763ASTZ
• Description: IC DAC 10BIT DUAL 125MSPS 48LQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9763ASTZ

• Data Interface: Parallel
• Settling Time: 35ns
• Number Of Bits: 10
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 10bit
• Sampling Rate: 125MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 3V To 5.5V
• Supply Voltage Range - Digital: 2.7V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9763-EBZ - BOARD EVAL FOR AD9763
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TERMINOLOGY
Linearity Error or Integral Nonlinearity (INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, that is associated with a 1 LSB change in digital
input code.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For I
inputs are all 0s. For I
inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span is the
gain error. The actual span is determined by the output when all
inputs are set to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
Output compliance range is the range of allowable voltage at the
output of a current-output DAC. Operation beyond the
maximum compliance limits can cause either output stage
saturation or breakdown resulting in nonlinear performance.
OUTB
OUTA
, 0 mA output is expected when all
B
, 0 mA output is expected when the
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Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25°C) value to the value at either T
and gain drift, the drift is reported in ppm of full-scale range
(FSR) per °C. For reference drift, the drift is reported in ppm/°C.
Power Supply Rejection (PSR)
Power supply rejection is the maximum change in the full-scale
output as the supplies are varied from nominal to minimum
and maximum specified voltages.
Settling Time
The settling time is the time required for the output to reach
and remain within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in decibels (dB), between the rms
amplitude of the output signal and the peak spurious signal over
the specified bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal. It is
expressed as a percentage or in decibels (dB).
MIN
or T
MAX
AD9763
. For offset