PIC16LF1847T-I/MV Microchip Technology, PIC16LF1847T-I/MV Datasheet - Page 153
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PIC16LF1847T-I/MV
Manufacturer Part Number
PIC16LF1847T-I/MV
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847T-I/MV
Processor Series
PIC16LF
Core
RISC
Data Bus Width
10 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
1024 B
Interface Type
SPI, I2C
Maximum Clock Frequency
32 KHZ
Number Of Programmable I/os
15
Number Of Timers
3
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
UQFN-28
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
PIC16F1847T
Supply Current (max)
34 uA
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
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17.0
The Digital-to-Analog Converter supplies a variable
voltage reference, ratiometric with the input source,
with 32 selectable output levels.
The input of the DAC can be connected to:
• External V
• V
• FVR (Fixed Voltage Reference)
The output of the DAC can be configured to supply a
reference voltage to the following:
• Comparator positive input
• ADC input channel
• DACOUT pin
The Digital-to-Analog Converter (DAC) can be enabled
by setting the DACEN bit of the DACCON0 register.
17.1
The DAC has 32 voltage level ranges. The 32 levels
are set with the DACR<4:0> bits of the DACCON1
register.
The DAC output voltage is determined by the following
equations:
EQUATION 17-1:
17.2
The DAC output value is derived using a resistor ladder
with each end of the ladder tied to a positive and
negative voltage reference input source. If the voltage
of either input source fluctuates, a similar fluctuation will
result in the DAC output value.
The value of the individual resistors within the ladder
can
Specifications”.
2011 Microchip Technology Inc.
V
Note:
OUT
DD
=
supply voltage
be
DIGITAL-TO-ANALOG
CONVERTER (DAC) MODULE
Output Voltage Selection
Ratiometric Output Level
V
V
V
SOURCE
REF
found
SOURCE
REF
+. V
pins
+ V
SOURCE
+ can equal FVR Buffer 2, V
–
in
DAC OUTPUT VOLTAGE
SOURCE
- can equal V
Section 30.0
-
DACR<4:0>
------------------------------ -
2 5
SS
or V
“Electrical
REF
+ V
DD
-.
SRC
or
Preliminary
-
17.3
In order for the DAC module to consume the least
amount of power, one of the two voltage reference input
sources to the resistor ladder must be disconnected.
Either the positive voltage source, (V
negative voltage source, (V
The negative voltage source is disabled by setting the
DACLPS bit in the DACCON0 register. Clearing the
DACLPS bit in the DACCON0 register disables the
positive voltage source.
17.3.1
The DAC output voltage can be set to V
least amount of power consumption by performing the
following:
• Clearing the DACEN bit in the DACCON0 register.
• Setting the DACLPS bit in the DACCON0 register.
• Configuring the DACPSS bits to the proper
• Configuring the DACR<4:0> bits to ‘11111’ in the
This is also the method used to output the voltage level
from the FVR to an output pin. See
Voltage Reference Output”
Reference
17.3.2
The DAC output voltage can be set to V
least amount of power consumption by performing the
following:
• Clearing the DACEN bit in the DACCON0 register.
• Clearing the DACLPS bit in the DACCON0 register.
• Configuring the DACNSS bits to the proper
• Configuring the DACR<4:0> bits to ‘00000’ in the
This allows the comparator to detect a zero-crossing
while not consuming additional current through the DAC
module.
Reference
positive source.
DACCON1 register.
negative source.
DACCON1 register.
Low Power Voltage State
Figure 17-1
Figure 17-1
OUTPUT CLAMPED TO POSITIVE
VOLTAGE SOURCE
OUTPUT CLAMPED TO NEGATIVE
VOLTAGE SOURCE
PIC16(L)F1847
for output clamping examples.
for output clamping examples.
SRC
for more information.
-) can be disabled.
Section 17.4 “DAC
DS41453B-page 153
SRC
SRC
SRC
+), or the
+ with the
- with the
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