LTC1289BCN Linear Technology, LTC1289BCN Datasheet - Page 24

IC DATA ACQ SYS 12BIT 3V 20-DIP

LTC1289BCN

Manufacturer Part Number
LTC1289BCN
Description
IC DATA ACQ SYS 12BIT 3V 20-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of LTC1289BCN

Resolution (bits)
12 b
Sampling Rate (per Second)
25k
Data Interface
Serial, Parallel
Voltage Supply Source
Dual ±
Voltage - Supply
3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1289BCN#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LTC1289
D
Location $77
Location $87
D
D
D
D
READ – / + : LDA #$3F
24
TYPICAL
OUT
IN
IN
IN
IN
SNEAK-A-BIT Code for the LTC1289 Using the MC68HC05C4
1
2
3
words for LTC1289
from LTC1289 in MC68HC05C4 RAM
MNEMONIC
0
0
0
LDA #$50
STA $0A
LDA #$FF
STA $06
BSET 0, $02
JSR READ –/+
JSR READ +/–
JSR READ –/+
JSR CHK SIGN
JSR TRANSFER Read LTC1289 routine
LDA $60
STA $71
LDA $61
STA $72
RTS
(ODD/SIGN)
A
0
1
0
PPLICATI
Sign
B12 B11 B10 B9 B8 B7 B6 B5
B4 B3 B2 B1 B0 filled with 0s
MUX Addr.
SNEAK-A-BIT Code
1
1
1
Configuration data for SPCR
Load configuration data into $0A
Configuration data for port C DDR
Load configuration data into port C DDR
Make sure CS is high
Dummy read configures LTC1289 for
next read
Read CH6 with respect to CH7
Read CH7 with respect to CH6
Determines which reading has valid
data, converts to 2's complement and
stores in RAM
Load D
Load MSBs from LTC1289 in ACC
Store MSBs in $71
Load LSBs from LTC1289 in ACC
Store LSBs in $72
Return
1
1
1
UNI
O
IN
1
1
1
word for LTC1289 into ACC
U
LSB
MSBF
DESCRIPTION
S
1
1
1
1
1
1
Length
Word
LTC1289 TA05
1
1
1
READ +/–:
TRANSFER: BCLR 0, $02
LOOP 1:
LOOP 2:
CHK SIGN: LDA $73
MINUS:
END:
SNEAK-A-BIT Code for the LTC1289 Using the MC68HC05C4
MNEMONIC
LDA #$7F
JSR TRANSFER Read LTC1289 routine
LDA $60
STA $73
LDA $61
STA $74
RTS
STA $0C
TST
BPL LOOP 1
LDA $0C
STA $0C
STA $60
TST
BPL LOOP 2
BSET 0, $02
LDA $0C
STA $61
RTS
ORA $74
BEQ MINUS
CLC
ROR $73
ROR $74
LDA $73
STA $77
LDA $74
STA $87
BRA END
CLC
ROR $71
ROR $72
COM $71
COM $72
LDA $72
ADD #$01
STA $72
CLRA
ADC $71
STA $71
STA $77
LDA $72
STA $87
RTS
$0B
$0B
Load D
Load MSBs from LTC1289 into ACC
Store MSBs in $73
Load LSBs from LTC1289 into ACC
Store LSBs in $74
Return
CS goes low
Load D
Test status of SPIF
Loop to previous instruction if not done
Load contents of SPI data reg into ACC
Start next cycle
Store MSBs in $60
Test status of SPIF
Loop to previous instruction if not done
CS goes high
Load contents of SPI data reg into ACC
Store LSBs in $61
Return
Load MSBs of +/– read into ACC
Or ACC (MSBs) with LSBs of +/– read
If result is 0 goto minus
Clear carry
Rotate right $73 through carry
Rotate right $74 through carry
Load MSBs of +/– read into ACC
Store MSBs in RAM locations $77
Load LSBs of +/– read into ACC
Store LSBs in RAM location $87
Goto end of routine
Clear carry
Shift MSBs of –/+ read right
Shift LSBs of –/+ read right
1's complement of MSBs
1's complement of LSBs
Load LSBs into ACC
Add 1 to LSBs
Store ACC in $72
Clear ACC
Add with carry to MSBs. Result in ACC
Store ACC in $71
Store MSBs in RAM locations $77
Load LSBs in ACC
Store LSBs in RAM location $87
Return
IN
IN
word for LTC1289 into ACC
into SPI. Start transfer
DESCRIPTION
1289fb

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