HI7188IN Intersil, HI7188IN Datasheet - Page 14

CONV A/D 16BIT 8:1 MUX 44-MQFP

HI7188IN

Manufacturer Part Number
HI7188IN
Description
CONV A/D 16BIT 8:1 MUX 44-MQFP
Manufacturer
Intersil
Datasheet

Specifications of HI7188IN

Number Of Bits
16
Sampling Rate (per Second)
240
Data Interface
QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
50mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HI7188IN
Manufacturer:
Intersil
Quantity:
10 000
A one channel example:
1. Channel 1 is sampled four times as labeled S1, S2, S3,
2. Each sample is equally spaced (From zero, S1 = 5 degrees,
3. Each sample is of the same duration of time.
4. Samples S1 and S3 (180 degrees later) will have the
5. Samples S2 and S4 (180 degrees later) will have the
6. The HI7188 sums the samples S1, S3, S2 and S4 which
7. These four samples are placed, real time, in the 4x8 array
and S4 in Figure 12. One sample for each 90 degrees
quadrant of line cycle (quarter main cycle).
S2 = 95 degrees, S3 = 185 degrees and S4 = 275 degrees).
equal magnitudes of line noise but have opposite signs.
equal magnitudes but opposite signs.
results in averaging the line noise signal to zero.
of registers used for LNR. The next quadrant sampled (S5)
replaces S1 in the running average. The new sample
replaced S1 at the same point on the line cycle, 5 degrees
but 360 degrees later. The line noise summation is still
zero. Now for every quarter main cycle thereafter, the LNR
will be updated and line noise free output will be available.
INTEGRATING
CHANNEL
ADDRESS
LOGICAL
SECTION
ANALOG
FILTER
FROM
1
23
CHANNELS
LOGICAL
14
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CCR REGISTERS
LINE NOISE FILTER
FIGURE 11. DIGITAL BLOCK DIAGRAM
EOS
CA
BYPASS
HI7188
LNR
RST
CONVERSION CONTROL
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
LINE NOISE
Calibration
Calibration is the process of adjusting the conversion data
based on known system offset and gain errors. For a
complete system calibration to occur, the on-chip
microcontroller must perform a three point calibration which
involves recording conversion results for three different input
conditions - “zero-scale,” “positive full-scale,” and “negative
full-scale”. With these readings, the HI7188 can null any
system offset errors and calculate the positive and negative
gain slope factors for the transfer function of the system. It is
4
MODE
FIGURE 12. LINE NOISE CYCLE INCLUDING PATENTED TIME
REGISTER
CONTROL
5
S1
6 7 8
24
CS
AND CONTROL
1
CALIBRATION
REGISTERS
SCLK
SPACED INPUT SAMPLING
2 3
S2
24
4
SDO
5
INTERFACE
8
6
SERIAL
7
SDIO
1
2
16
3
4
5
RSTIO
S3
RAM0
6 7
CH3
CH5
CH1
CH2
CH4
CH6
CH8
CH7
8
GENERATOR
OSC1 OSC2
16
1
CLOCK
S4
2 3
RAM1
4
CH3
CH5
CH1
CH2
CH4
CH6
CH8
CH7
TIME
5
S5
6
8
7

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