LTC2351HUH-14#PBF Linear Technology, LTC2351HUH-14#PBF Datasheet - Page 4

IC ADC 14BIT 1.5MSPS 32-QFN

LTC2351HUH-14#PBF

Manufacturer Part Number
LTC2351HUH-14#PBF
Description
IC ADC 14BIT 1.5MSPS 32-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2351HUH-14#PBF

Number Of Bits
14
Sampling Rate (per Second)
1.5M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
16.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC2351HUH-14#PBFLTC2351HUH-14
Manufacturer:
LT
Quantity:
10 000
POWER REQUIREMENTS
TIMING CHARACTERISTICS
LTC2351-14
DIGITAL INPUTS AND DIGITAL OUTPUTS
I
C
V
V
I
C
I
I
range, otherwise specifi cations are at T
SYMBOL
V
I
P
range, otherwise specifi cations are at T
SYMBOL
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: All voltage values are with respect to ground GND.
4
full operating temperature range, otherwise specifi cations are at T
IN
OZ
SOURCE
SINK
DD
SAMPLE(MAX)
THROUGHPUT
SCK
CONV
1
2
3
4
5
6
7
8
9
10
11
IN
OH
OL
OZ
DD
D
, V
+ I
CC
CC
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage D
Hi-Z Output Capacitance D
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
PARAMETER
Maximum Sampling Rate per Channel
(Conversion Rate)
Minimum Sampling Period (Conversion + Acquisiton Period)
Clock Period
Conversion Time
Minimum High or Low SCLK Pulse Width
CONV to SCK Setup Time
SCK Before CONV
Minimum High or Low CONV Pulse Width
SCK↑ to Sample Mode
CONV↑ to Hold Mode
96th SCK↑ to CONV↑ Interval (Affects Acquisition Period)
Minimum Delay from SCK to Valid Bits 0 Through 11
SCK↑ to Hi-Z at SDO
Previous SDO Bit Remains Valid After SCK
V
PARAMETER
Supply Voltage
Supply Current
Power Dissipation
REF
Settling Time After Sleep-to-Wake Transition
OUT
OUT
A
A
= 25°C. V
= 25°C. V
CONDITIONS
Active Mode, f
Nap Mode
Active Mode, f
Nap Mode (LTC2351H-14)
Sleep Mode
Active Mode with SCK, f
The
V
V
V
V
V
V
V
DD
DD
IN
DD
DD
DD
OUT
OUT
OUT
The
= 0V to V
l
= V
= 3V.
= 3V, I
= 2.7V, I
= 2.7V, I
= 0V and V
= 0V, V
= V
denotes the specifi cations which apply over the full operating temperature
l
CC
DD
denotes the specifi cations which apply over the full operating temperature
OUT
= 3V.
= 3V
SAMPLE
SAMPLE
DD
OUT
OUT
DD
= –200μA
= 3V
= 160μA
DD
= 1.6mA
A
= 1.5Msps
= 1.5Msps (LTC2351H-14)
CONDITIONS
(Note 16)
(Notes 6, 17)
(Note 6)
(Notes 6, 10)
(Note 6)
(Note 6)
(Note 6)
(Notes 6, 11)
(Notes 6, 7, 13)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 14)
= 25°C. V
SAMPLE
Note 3: When these pins are taken below GND or above V
clamped by internal diodes. This product can handle input currents greater
than 100mA below GND or greater than V
Note 4: Offset and range specifi cations apply for a single-ended CH0
input with CH0
= 1.5Msps
The
DD
= V
l
denotes the specifi cations which apply over the
CC
– CH5
= 3V.
grounded and using the internal 2.5V reference.
l
l
l
l
l
l
l
l
l
l
l
MIN
MIN
250
2.5
2.7
1.2
40
96
45
2
3
0
4
4
2
DD
16.5
TYP
TYP
without latchup.
0.05
5.5
1.5
1.8
2.9
20
15
2
3
6
4
5
1
10000
10000
MAX
MAX
4
8
6
3.6
2.5
±10
±10
15
0.4
8
2
9
DD
, they will be
SCLK cycles
+
235114fb
– CH5
UNITS
UNITS
mW
kHz
mA
mA
mA
mA
mA
mA
ms
μA
μA
μA
pF
pF
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
+

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