AD7888ARZ Analog Devices Inc, AD7888ARZ Datasheet - Page 5

• Manufacturer Part Number: AD7888ARZ
• Description: IC ADC 12BIT 8CH SRL 16-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7888ARZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 12
• Sampling Rate (per Second): 125k
• Number Of Converters: 1
• Power Dissipation (max): 3.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Resolution (bits): 12bit
• Sampling Rate: 125kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 2.7V To 5.25V
• Supply Current: 700µA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. C
Pin
No.
1
2
3
4, 13
5–12
14
15
16
Mnemonic
CS
REF IN/REF OUT
V
AGND
AIN1–AIN8
DIN
DOUT
SCLK
DD
Function
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7888 and also frames the serial data transfer.
Reference Input/Output. The on-chip reference is available on this pin for use external to the AD7888.
Alternatively, the internal reference can be disabled and an external reference applied to this input.
The voltage range for the external reference is from 1.2 V to V
Power Supply Input. The V
Analog Ground. Ground reference point for all circuitry on the AD7888. All analog input signals and
any external reference signals should be referred to this AGND voltage. Both of these pins should
connect to the AGND plane of a system.
Analog Input 1 through Analog Input 8. Eight single-ended analog input channels that are multiplexed
into the on-chip track/hold. The analog input channel to be converted is selected by using the ADD0
through ADD2 bits of the Control Register. The input range for all input channels is 0 to V
unused input channels should be connected to AGND to avoid noise pickup.
Data In. Logic Input. Data to be written to the AD7888’s Control Register is provided on this input
and is clocked into the register on the rising edge of SCLK (see Control Register section).
Data Out. Logic Output. The conversion result from the AD7888 is provided on this output as a serial
data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists
of four leading zeros followed by the 12 bits of conversion data, which is provided MSB first.
Serial Clock. Logic Input. SCLK provides the serial clock for accessing data from the part and writing
serial data to the Control Register. This clock input is also used as the clock source for the AD7888’s
conversion process.
REF IN/REF OUT
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATIONS
AGND
AIN1
AIN2
AIN3
AIN4
V
SOIC AND TSSOP
CS
DD
DD
1
2
3
4
5
6
7
8
range for the AD7888 is from 2.7 V to 5.25 V.
(Not to Scale)
TOP VIEW
AD7888
16
15
14
13
12
11
10
9
SCLK
DOUT
DIN
AGND
AIN8
AIN7
AIN6
AIN5
DD
.
AD7888
REF
. Any