AD7888ARZ Analog Devices Inc, AD7888ARZ Datasheet - Page 10

IC ADC 12BIT 8CH SRL 16-SOIC

AD7888ARZ

Manufacturer Part Number
AD7888ARZ
Description
IC ADC 12BIT 8CH SRL 16-SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7888ARZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
125k
Number Of Converters
1
Power Dissipation (max)
3.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Resolution (bits)
12bit
Sampling Rate
125kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
700µA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7888ARZ
Manufacturer:
ADI
Quantity:
1 000
Part Number:
AD7888ARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7888ARZ
Quantity:
30 000
Part Number:
AD7888ARZ-REEL7
Manufacturer:
ADI
Quantity:
1 000
AD7888
order to obtain optimum performance from the device it is
advised to disable the internal reference by setting the REF bit
in the Control Register when an external reference is applied.
When the internal reference is disabled, SW1 in Figure 11 will
open and the input impedance seen at the REF IN/REF OUT
pin is the input impedance of the reference buffer, which is in
the region of giga Ω. When the reference is enabled, the input
impedance seen at the pin is typically 5 kΩ.
PM1
0
0
1
1
POWER-DOWN OPTIONS
The AD7888 provides flexible power management to allow the
user to achieve the best power performance for a given through-
put rate.
The power management options are selected by programming
the power management bits (i.e., PM1 and PM0) in the control
register. Table III summarizes the options available. When the
power management bits are programmed for either of the auto
power-down modes, the part will enter the power-down mode
on the 16th rising SCLK edge after the falling edge of CS. The
first falling SCLK edge after the CS falling edge will cause the
part to power up again. When the AD7888 is in full shutdown,
PM0
0
1
0
1
REF IN/REF OUT
Table III. Power Management Options
Mode
Normal Operation. In this mode, the AD7888
remains in full power mode regardless of the
status of any of the logic inputs. This mode
allows the fastest possible throughput rate from
the AD7888.
Full Shutdown. In this mode, the AD7888 is
in full shutdown mode with all circuitry on the
AD7888, including the on-chip reference, enter-
ing its power-down mode. The AD7888 retains
the information in the control Register bits
while in full shutdown. The part remains in full
shutdown until these bits are changed.
Autoshutdown. In this mode, the AD7888
automatically enters full shutdown mode at the
end of each conversion. Wake-up time from full
shutdown is 5 µs and the user should ensure that
5 µs have elapsed before attempting to perform
a valid conversion on the part in this mode.
Autostandby. In this standby mode, portions
of the AD7888 are powered down but the on-
chip reference voltage remains powered up. The
REF bit should be 0 to ensure the on-chip refer-
ence is enabled. This mode is similar to auto-
shutdown but allows the part to power-up
much faster.
2.5V
SW1
5k
the only way to fully power it up again is to reprogram the
power management bits to PM1 = PM0 = 0, i.e., normal
mode. In this case the device will power up on the 16th SCLK
rising edge after the CS falling edge as this is when the power
management bits become effective.
Power-Up Times
The AD7888 has an approximate 1 µs power-up time when
powering up from standby or when using an external reference.
When V
i.e., it powers up in normal mode. If the part is put into shut-
down, a subsequent power-up will take approximately 5 µs. The
AD7888 wake-up time is very short in the autostandby mode so
it is possible to wake up the part and carry out a valid conver-
sion in the same read/write operation.
POWER vs. THROUGHPUT RATE
By operating the AD7888 in autoshutdown or autostandby
mode the average power consumption of the AD7888 decreases
at lower throughput rates. Figure 12 shows how as the through-
put rate is reduced, the device remains in its power-down state
longer and the average power consumption over time drops
accordingly.
For example, if the AD7888 were operated in a continuous
sampling mode, with a throughput rate of 10 kSPS and a SCLK
of 2 MHz (V
device is in autoshutdown mode and the on-chip reference is
used, the power consumption is calculated as follows. The
power dissipation during normal operation is 3.5 mW (V
5 V). If the power-up time is 5 µs and the remaining conversion-
plus-acquisition time is 15.5 t
(see Figure 14a), the AD7888 can be said to dissipate 3.5 mW
for 12.75 µs during each conversion cycle. If the throughput rate
is 10 kSPS, the cycle time is 100 µs and the average power dissi-
pated during each cycle is (12.75/100) × (3.5 mW) = 446.25 µW.
If V
shutdown mode using the on-chip reference, the power dissipa-
tion during normal operation is 2.1 mW. The AD7888 can now
be said to dissipate 2.1 mW for 12.75 µs during each conversion
cycle. With a throughput rate of 10 kSPS, the average power
dissipated during each cycle is (12.75/100) × (2.1 mW) =
267.75 µW. Figure 12 shows the power vs. throughput rate for
automatic shutdown with both 5 V and 3 V supplies.
DD
= 3 V SCLK = 2 MHz, and the device is again in auto-
0.01
0.1
DD
10
1
0
is first connected, the AD7888 will fully power up,
DD
= 5 V), and if PM1 = 1 and PM0 = 0, i.e., the
V
SCLK = 2MHz
10
DD
= 5V
THROUGHPUT – kSPS
V
SCLK = 2MHz
DD
20
= 3V
SCLK
, i.e., approximately 7.75 µs,
30
40
50
REV. C
DD
=

Related parts for AD7888ARZ