ISL51002CQZ-150 Intersil, ISL51002CQZ-150 Datasheet - Page 19

• Manufacturer Part Number: ISL51002CQZ-150
• Description: IC FRONT END 10BIT VID 128-MQFP
• Manufacturer: Intersil

Specifications of ISL51002CQZ-150

• Number Of Bits: 10
• Number Of Channels: 3
• Power (watts): 1.2W
• Voltage - Supply, Analog: 1.8V, 3.3V
• Voltage - Supply, Digital: 1.8V, 3.3V
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Listing
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
Measurement Configuration,
(0x00)
AUTO ADJUST REGISTERS
0x50
0x51
ADDRESS
VSYNC Period MSB,
(read only)
VSYNC Period LSB,
(read only)
VSYNC Width,
(read only)
DE Start MSB, (0x00)
DE Start LSB, (0xF6)
DE Width MSB, (0x05)
DE Width LSB, (0x00)
Line Start MSB, (0x00)
Line Start LSB, (0x26)
Line Width MSB, (0x04)
Line Width LSB, (0x00)
Phase ADJ CMD FN, (0x00)
Phase ADJ STATUS,
(read only)
(DEFAULT VALUE)
REGISTER
(Continued)
19
BITS
3:0
7:0
6:0
1:0
7:0
3:0
7:0
1:0
7:0
3:0
7:0
2:0
0
1
7
VSYNC Period MSB
VSYNC Period LSB
VSYNC Width
DE Start MSB
DE Start LSB
DE Width MSB
DE Width LSB
Line Start MSB
Line Start LSB
Line Width MSB
Line Width LSB
VSYNC Units
VSYNC_Linecount_Mode
PADJ Function
PADJ Busy
FUNCTION NAME
ISL51002
These bits report a 12-bit value containing the width of one frame
(= 2 fields for interlaced, = 1 field for progressive) of video.
VSYNC period for measured channel =
256*VSYNC Period MSB + VSYNC Period LSB
Units are either number of HSYNC periods or number of
fCRYSTAL/512 periods, depending on setting of VSYNC Units
register.
This register reports a 7-bit value containing the width the
VSYNC pulse. The value returned is for true VSYNC only: it
does not include serrations, EQ pulses, Macrovision pulses,
etc. Units are either number of HSYNC periods or number of
fCRYSTAL/512 periods, depending on setting of VSYNC Units
register.
10-bit value containing the number of pixel clocks between the
trailing edge of HS
values.
12-bit value containing the number of visible image pixels.
SXGA default values.
10-bit value containing the number of lines between the trailing
edge of VSYNC
values.
12-bit value containing the number of visible lines.
SXGA default values.
0: VSYNC measurement reported in units of lines
1: VSYNC measurement reported in units of 512 crystal clock
0: New method (Integer count of HS
1: Old method (Time measurement with rounding errors)
Note: A write to this register executes the command contained
in the three LSBs of the word written. Commands:
000: Reserved
001: Reserved
010: Reserved
011: SetPhase
100: Set DE
101: Reserved
110: Reserved
111: Reserved
0: Phase Adjustment function idle
1: Phase Adjustment in progress
(HSYNC periods)
periods
OUT
OUT
and the first valid line. SXGA default
DESCRIPTION
and the first valid pixel. SXGA default
OUT
s)
September 19, 2007
FN6164.2