PCA2125TS/1,112 NXP Semiconductors, PCA2125TS/1,112 Datasheet - Page 19

• Manufacturer Part Number: PCA2125TS/1,112
• Description: IC CMOS RTC/CALENDAR 14-TSSOP
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCA2125TS/1,112

• Package / Case: 14-TSSOP
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Function: Clock, Calendar
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.3 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6292 - DEMO BOARD PCA2125 RTC
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283386112; PCA2125TS/1; PCA2125TS/1

NXP Semiconductors
PCA2125_1
Product data sheet
8.7.2 Countdown timer interrupts
The timing shown for clearing bit MSF in
interrupt mode i.e. when bit TI_TP = 0, where the pulse can be shortened by setting both
bits MI and SI to logic 0.
Generation of interrupts from the countdown timer is controlled via bit TIE; see
The pulse generator for the countdown timer interrupt also uses an internal clock which is
dependent on the selected source clock for the countdown timer and on the countdown
value n. As a consequence, the width of the interrupt pulse varies; see
Table 34.
[1]
If the TF flag is clear before the end of the INT pulse, then the INT pulse is shortened. This
allows the source of a system interrupt to be cleared immediately it is serviced i.e. the
system does not have to wait for the completion of the pulse before continuing; see
Figure
Source clock (Hz)
4096
64
1
1
Fig 12. Example of shortening the INT pulse by clearing the MSF flag
60
n = loaded countdown value. Timer stopped when n = 0.
(1) Indicates normal duration of INT pulse (bit TI_TP = 1).
13. Instructions for clearing TF are given in
INT operation (bit TI_TP = 1)
seconds counter
instruction
MSF
SCL
INT
Rev. 01 — 28 July 2008
58
INT period (s)
n = 1
1
1
1
1
8192
128
64
64
59
[1]
Figure 12
CLEAR INSTRUCTION
Section
is also valid for the non-pulsed
SPI Real-time clock/calendar
8.6.3.
8th clock
n > 1
1
1
1
1
4096
64
64
64
001aaf908
PCA2125
© NXP B.V. 2008. All rights reserved.
Table
(1)
34.
Table
19 of 36
7.