M48T201Y-70MH1E STMicroelectronics, M48T201Y-70MH1E Datasheet - Page 17

IC SUPERVISOR TIMEKPR 5V 44-SOH

M48T201Y-70MH1E

Manufacturer Part Number
M48T201Y-70MH1E
Description
IC SUPERVISOR TIMEKPR 5V 44-SOH
Manufacturer
STMicroelectronics
Series
Timekeeper®r
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of M48T201Y-70MH1E

Memory Size
External
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-SOH
Number Of Voltages Monitored
1
Monitored Voltage
3.3 V, 5 V
Manual Reset
Not Resettable
Watchdog
Watchdog
Battery Backup Switching
Backup
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Supply Current (typ)
15000 uA
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Power Fail Detection
Yes
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2840-5
M48T201Y-70MH1
M48T201Y, M48T201V
3
3.1
3.2
3.3
Note:
3.4
Clock operation
TIMEKEEPER
The M48T201Y/V offers 16 internal registers which contain TIMEKEEPER
watchdog, flag, and control data (see
locations which contain external (user accessible) and internal copies of the data (usually
referred to as BiPORT™ TIMEKEEPER cells). The external copies are independent of
internal functions except that they are updated periodically by the simultaneous transfer of
the incremented internal copy. TIMEKEEPER and alarm registers store data in BCD.
control, watchdog and flags (bits D0 to D3) registers store data in binary format.
Reading the clock
Updates to the TIMEKEEPER registers should be halted before clock data is read to prevent
reading data in transition. The BiPORT TIMEKEEPER cells in the RAM array are only data
registers and not the actual clock counters, so updating the registers can be halted without
disturbing the clock itself.
Updating is halted when a '1' is written to the READ bit, D6 in the control register (7FFF8h).
As long as a '1' remains in that position, updating is halted. After a halt is issued, the
registers reflect the count; that is, the day, date, and time that were current at the moment
the halt command was issued.
All of the TIMEKEEPER registers are updated simultaneously. A halt will not interrupt an
update in progress. Updating occurs approximately 1 second after the READ bit is reset to a
'0.'
Setting the clock
Bit D7 of the control register (7FFF8h) is the WRITE bit. Setting the WRITE bit to a '1,' like
the READ bit, halts updates to the TIMEKEEPER registers. The user can then load them
with the correct day, date, and time data in 24-hour BCD format (see
Resetting the WRITE bit to a '0' then transfers the values of all time registers (7FFFFh-
7FFF9h, 7FFF1h) to the actual TIMEKEEPER counters and allows normal operation to
resume. After the WRITE bit is reset, the next clock update will occur approximately one
second later.
Upon power-up following a power failure, both the WRITE bit and the READ bit will be reset
to '0.'
Stopping and starting the oscillator
The oscillator may be stopped at any time. If the device is going to spend a significant
amount of time on the shelf, the oscillator can be turned off to minimize current drain on the
battery. The STOP bit is located at bit D7 within the seconds register (7FFF9h). Setting it to
a '1' stops the oscillator. When reset to a '0,' the M48T201Y/V oscillator starts within one
second.
®
registers
Table 5 on page
18). These registers are memory
Table 5 on page
®
Clock operation
, alarm,
18).
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