M41ST87WMX6TR STMicroelectronics, M41ST87WMX6TR Datasheet - Page 32
![IC SUPERVISOR RTC 160X8 28-SOIC](/photos/6/56/65690/stmicroelectronics-28-soic_sml.jpg)
M41ST87WMX6TR
Manufacturer Part Number
M41ST87WMX6TR
Description
IC SUPERVISOR RTC 160X8 28-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Specifications of M41ST87WMX6TR
Memory Size
160B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Bus Type
Serial (2-Wire, I2C)
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
28
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6457-2
M41ST87WMX6TR
M41ST87WMX6TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M41ST87WMX6TR
Manufacturer:
MBI
Quantity:
12 000
Clock operation
Figure 22. Calibration waveform
3.3
32/48
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41ST87Y/W is in the battery back-up to serve as a system wake-up call.
Bits RPT5–RPT1 put the alarm in the repeat mode of operation.
the possible configurations. Codes not listed in the table default to the once per second
mode to quickly alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set, the
alarm condition activates the IRQ/OUT pin as shown in
alarm, write '0' to the alarm date register and to RPT5–RPT1.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ/OUT output is cleared by a READ to the flags register. A subsequent READ of the
flags register is necessary to see that the value of the alarm flag has been reset to '0.'
The IRQ/OUT pin can also be activated in the battery backup mode. The IRQ/OUT will go
low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE are
set. The ABE and AFE bits are reset during power-up, therefore an alarm generated during
power-up will only set AF. The user can read the flag register at system boot-up to
determine if an alarm was generated while the M41ST87Y/W was in the deselect mode
during power-up.
Figure 24 on page 33
illustrates the backup mode alarm timing.
Figure 24 on page
Table 8 on page 33
M41ST87Y, M41ST87W
33. To disable
AI00594B
shows