M41ST87WMX6TR STMicroelectronics, M41ST87WMX6TR Datasheet - Page 2

IC SUPERVISOR RTC 160X8 28-SOIC

M41ST87WMX6TR

Manufacturer Part Number
M41ST87WMX6TR
Description
IC SUPERVISOR RTC 160X8 28-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheets

Specifications of M41ST87WMX6TR

Memory Size
160B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Bus Type
Serial (2-Wire, I2C)
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
28
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6457-2
M41ST87WMX6TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41ST87WMX6TR
Manufacturer:
MBI
Quantity:
12 000
Part Number:
M41ST87WMX6TR
Manufacturer:
STM
Quantity:
117
Part Number:
M41ST87WMX6TR
Manufacturer:
ST
Quantity:
1 000
Contents
Contents
1
2
3
2/48
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
Clock operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Avoiding inadvertent tampers (normally closed configuration) . . . . . . . . . 26
Tamper event time-stamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Security features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Data retention mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Tamper detection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Tamper register bits (tamper 1 and tamper 2) . . . . . . . . . . . . . . . . . . . . . 17
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
2.6.6
2.6.7
2.6.8
2.6.9
Tamper detection operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Internal tamper pull-up/down current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.0.1
Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Tamper enable bits (TEB1 and TEB2) . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Tamper bits (TB1 and TB2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Tamper interrupt enable bits (TIE1 and TIE2) . . . . . . . . . . . . . . . . . . . . 18
Tamper connect mode bit (TCM1 and TCM2) . . . . . . . . . . . . . . . . . . . . 18
Tamper polarity mode bits (TPM1 and TPM2) . . . . . . . . . . . . . . . . . . . . 18
Tamper detect sampling (TDS1 and TDS2) . . . . . . . . . . . . . . . . . . . . . . 21
Tamper current high/tamper current low (TCHI/TCLO1 and
TCHI/TCLO2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
RAM clear (CLR1 and CLR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
RAM clear external (CLR1
Power-down time-stamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
EXT
and CLR2
EXT
) . . . . . . . . . . . . . . . . . . . . 21
M41ST87Y, M41ST87W

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