SI5325C-B-GM Silicon Laboratories Inc, SI5325C-B-GM Datasheet - Page 13

• Manufacturer Part Number: SI5325C-B-GM
• Description: IC UP-PROG CLK MULTIPLIER 36QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5325C-B-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 346MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.62 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 346MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 10 MHz
• Output Frequency Range: 10 MHz to 1417 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.62 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

D
Revision 0.23 to Revision 0.24
Revision 0.24 to Revision 0.25
Revision 0.25 to Revision 0.26
OCUMENT
Clarified that the two outputs have a common, higher
frequency source on page 1.
Changed LVTTL to LVCMOS in Table 2, “Absolute
Maximum Ratings,” on page 3.
Added Figure 1, “Typical Phase Noise Plot,” on page
4.
Updated “2. Pin Descriptions: Si5325”.
Updated "3. Ordering Guide" on page 9.
Added “5. Recommended PCB Layout”.
Updated Section "2. Pin Descriptions: Si5325" on
page 6.
Removed Figure 1. “Typical Phase Noise Plot.”
Changed pins 11 and 15 from NC to VDD in “2. Pin
Descriptions: Si5325”.
Removed references to latency control, INC, and DEC.
Changed font for register names to underlined italics.
C
HANGE
L
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Preliminary Rev. 0.26
Si5325
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