CY28RS400ZXCT Cypress Semiconductor Corp, CY28RS400ZXCT Datasheet - Page 8

• Manufacturer Part Number: CY28RS400ZXCT
• Description: IC CLOCK GENERATOR 56-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Generatorr

Specifications of CY28RS400ZXCT

• Frequency - Max: 100MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP II
• Frequency-max: 100MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output: -
• Input: -

Document #: 38-07637 Rev. *B
Crystal Recommendations
The CY28RS400 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28RS400 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Table 6. Crystal Recommendations
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
Calculating Load Capacitors
In addition to the standard external trim capacitors, trace
capacitance and pin capacitance must also be considered to
correctly calculate crystal loading. As mentioned previously,
the capacitance on each side of the crystal is in series with the
14.31818 MHz
Frequency
(Fund)
Cut
AT
Loading Load Cap
Parallel
Cs1
Figure 1. Crystal Capacitive Clarification
20 pF
Figure 2. Crystal Loading Example
Ce1
X1
Ci1
Clock Chip
0.1 mW
(max.)
Drive
XTAL
Shunt Cap
Ci2
The following diagram shows a typical crystal configuration
using the two trim capacitors. An important clarification for the
following discussion is that the trim capacitors are in series
with the crystal not parallel. It’s a common misconception that
load capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
crystal. This means the total capacitance on each side of the
crystal must be twice the specified crystal load capacitance
(CL). While the capacitance on each side of the crystal is in
series with the crystal, trim capacitors (Ce1,Ce2) should be
calculated to provide equal capacitive loading on both sides.
X2
(max.)
5 pF
Ce2
Cs2
Motional
0.016 pF
(max.)
3 to 6p
33pF
Pin
Trim
Trace
2.8pF
Tolerance
35 ppm
(max.)
Stability
CY28RS400
30 ppm
(max.)
Page 8 of 19
Aging
(max.)
5 ppm
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