CY28RS400ZXCT Cypress Semiconductor Corp, CY28RS400ZXCT Datasheet - Page 6

• Manufacturer Part Number: CY28RS400ZXCT
• Description: IC CLOCK GENERATOR 56-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Generatorr

Specifications of CY28RS400ZXCT

• Frequency - Max: 100MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP II
• Frequency-max: 100MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output: -
• Input: -

Document #: 38-07637 Rev. *B
Byte 2: Control Register 2 (continued)
Byte 3: Control Register 3
Byte 4: Control Register 4
Byte 5: Control Register 5
Bit
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
0
@Pup
@Pup
@Pup
@Pup
1
0
1
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
SRC[T/C]5
SRC[T/C]4
SRC[T/C]3
SRC[T/C]2
SRC[T/C]1
SRC[T/C]0
SRC[T/C]5
SRC[T/C]4
CLKREQ#
Reserved
Reserved
Reserved
Reserved
Name
Name
Name
CPU2
CPU1
CPU0
Name
CPU
SRC
CPU
Reserved
CLKREQ# drive mode
0 = SRC clocks driven when stopped, 1 = SRC clocks tri-state when
stopped
CPU pd drive mode
0 = CPU clocks driven when power down, 1 = CPU clocks tri-state
SRC pd drive mode
0 = SRC clocks driven when power down, 1 = SRC clocks tri-state
CPU_STOP# drive mode
0 = CPU clocks driven , 1 = CPU clocks tri-state
Allow control of CPU2 with CPU_STOP#
0 = CPU2 is free running, 1 = CPU2 is stopped with CPU_STOP#
Allow control of CPU1 with CPU_STOP#
0 = CPU1 is free running, 1 = CPU1 is stopped with CPU_STOP#
Allow control of CPU0 with CPU_STOP#
0 = CPU0 is free running, 1 = CPU0 is stopped with CPU_STOP#
Reserved
SRC[T/C]5 CLKREQ0 control
1 = SRC[T/C]5 stoppable by CLKREQ#0 pin
0 = SRC[T/C]5 free running
SRC[T/C]4 CLKREQ#0 control
1 = SRC[T/C]4 stoppable by CLKREQ#0 pin
0 = SRC[T/C]4 free running
SRC[T/C]3 CLKREQ#0 control
1 = SRC[T/C]3 stoppable by CLKREQ#0 pin
0 = SRC[T/C]3 free running
SRC[T/C]2 CLKREQ#0 control
1 = SRC[T/C]2 stoppable by CLKREQ#0 pin
0 = SRC[T/C]2 free running
SRC[T/C]1 CLKREQ#0 control
1 = SRC[T/C]1 stoppable by CLKREQ#0 pin
0 = SRC[T/C]1 free running
SRC[T/C]0 CLKREQ#0 control
1 = SRC[T/C]1 stoppable by CLKREQ#0 pin
0 = SRC[T/C]1 free running
SRC[T/C]5 CLKREQ#1 control
1 = SRC[T/C]5 stoppable by CLKREQ#1 pin
0 = SRC[T/C]5 free running
SRC[T/C]4 CLKREQ#1 control
1 = SRC[T/C]4 stoppable by CLKREQ#1 pin
0 = SRC[T/C]4 free running
Reserved
Reserved
Description
Description
Description
Description
CY28RS400
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