IDT5T2010BBI IDT, Integrated Device Technology Inc, IDT5T2010BBI Datasheet

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IDT5T2010BBI

Manufacturer Part Number
IDT5T2010BBI
Description
IC CLK DVR ZD PLL 2.5V 144-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
TeraClock™r
Type
PLL Clock Driverr
Datasheet

Specifications of IDT5T2010BBI

Pll
Yes with Bypass
Input
eHSTL, HSTL, LVPECL, LVTTL
Output
eHSTL, HSTL, LVTTL
Number Of Circuits
1
Ratio - Input:output
2:10
Differential - Input:output
Yes/No
Frequency - Max
250MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-BGA
Frequency-max
250MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
5T2010BBI

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Price
Part Number:
IDT5T2010BBI
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IDT
Quantity:
23
Part Number:
IDT5T2010BBI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT5T2010BBI
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IDT5T2010BBI
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IDT
Quantity:
20 000
FEATURES:
• 2.5 V
• 5 pairs of outputs
• Low skew: 50ps same pair, 100ps all outputs
• Selectable positive or negative edge synchronization
• Tolerant of spread spectrum input clock
• Synchronous output enable
• Selectable inputs
• Input frequency: 4.17MHz to 250MHz
• Output frequency: 12.5MHz to 250MHz
• 1.8V / 2.5V LVTTL: up to 250MHz
• HSTL / eHSTL: up to 250MHz
• Hot insertable and over-voltage tolerant inputs
• 3-level inputs for selectable interface
• 3-level inputs for feedback divide selection with multiply ratios
• Selectable HSTL, eHSTL, 1.8V/2.5V LVTTL, or LVEPECL input
• Selectable differential or single-ended inputs and ten single-
• PLL bypass for DC testing
• External differential feedback, internal loop filter
• Low Jitter: <75ps cycle-to-cycle
• Power-down mode
• Lock indicator
• Available in BGA and VFQFPN packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
IDT5T2010
2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK
c
of(1-6, 8, 10, 12)
interface
ended outputs
2006
DD
Integrated Device Technology, Inc.
REF
REF
V
V
V
REF
REF
OMODE
RxS
REF2
REF0
REF1
FB/
FB
0
1
0
1
/
/
REF_SEL
0
1
3
DS
/N
1:0
3
2.5V ZERO DELAY PLL
CLOCK DRIVER TERACLOCK™
PD
PE
PLL
FS LOCK
1
DESCRIPTION:
mance computing and data-communications applications. The IDT5T2010
has ten outputs in five banks of two, plus a dedicated differential feedback.
The redundant input capability allows for a smooth change over to a
secondary clock source when the primary clock source is absent.
the use of the DS[1:0] inputs. This provides the user with frequency
multiplication 1 to 12 without using divided outputs for feedback. Each output
bank also allows for a divide-by functionality of 2 or 4.
input to ten single-ended outputs. The clock driver also acts as a translator from
a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended
1.8V/2.5V LVTTL input to HSTL, eHSTL, or 1.8V/2.5V LVTTL outputs.
Selectable interface is controlled by 3-level input signals that may be hard-wired
to appropriate high-mid-low levels. The outputs can be synchronously
enabled/disabled.
the positive edge of the REF clock input. When PE is held low, all the outputs
are synchronized with the negative edge of REF.
The IDT5T2010 is a 2.5V PLL clock driver intended for high perfor-
The feedback bank allows divide-by-functionality from 1 to 12 through
The IDT5T2010 features a user-selectable, single-ended or differential
Furthermore, when PE is held high, all the outputs are synchronized with
PLL_EN
0
1
FBF
Divide
Select
Divide
Select
Divide
Select
Divide
Select
Divide
Select
Divide
Select
1F
2F
3F
4F
5F
2:1
2:1
2:1
2:1
2:1
2:1
4sOE
2sOE
3sOE
5sOE
1sOE
INDUSTRIAL TEMPERATURE RANGE
TxS
1
1
2
2
3
3
4
4
5
5
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
FB
FB
0
1
0
1
0
1
0
1
0
1
MARCH 2006
IDT5T2010
DSC 5981/29

Related parts for IDT5T2010BBI

IDT5T2010BBI Summary of contents

Page 1

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK FEATURES: • 2 • 5 pairs of outputs • Low skew: 50ps same pair, 100ps all outputs • Selectable positive or negative edge synchronization • Tolerant of spread spectrum input ...

Page 2

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK PIN CONFIGURATION 1sOE OMODE REF_ D GND V DD SEL REF 1 ...

Page 3

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK PIN CONFIGURATION REF_SEL REF 3 1 REF / REF1 REF 5 0 REF / REF0 7 FB FB/V 8 REF2 ...

Page 4

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK ABSOLUTE MAXIMUM RATINGS Symbol Description ( Power Supply Voltage DDQ DD V Input Voltage I V Output Voltage O (3) V Reference Voltage REF T Junction Temperature J T ...

Page 5

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK PIN DESCRIPTION, CONTINUED Symbol I/O Type Description (1) REF_SEL I LVTTL Reference clock select. When LOW, selects REF nsOE Synchronous output enable. When nsOE is HIGH, nQ (1) I LVTTL LOW/HIGH or ...

Page 6

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK EXTERNAL DIFFERENTIAL FEEDBACK By providing a dedicated external differential feedback, the IDT5T2010 gives users flexibility with regard to divide selection. The FB and FB/ V signals are compared with the input REF ...

Page 7

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INPUT/OUTPUT SELECTION Input 2.5V LVTTL SE 1.8V LVTTL SE 2.5V LVTTL DSE 1.8V LVTTL DSE LVEPECL DSE eHSTL DSE HSTL DSE 2.5V LVTTL DIF 1.8V LVTTL DIF LVEPECL DIF eHSTL DIF HSTL ...

Page 8

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR HSTL Symbol Parameter Input Characteristics I Input HIGH Current IH I Input LOW Current IL V Clamp Diode Voltage Input Voltage IN ...

Page 9

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL Symbol Parameter V Input Signal Swing (1) DIF V Differential Input Signal Crossing Point X V Input Timing Measurement Reference Level THI ( ...

Page 10

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK POWER SUPPLY CHARACTERISTICS FOR eHSTL OUTPUTS Symbol Parameter I Quiescent V Power Supply Current DDQ DD I Quiescent V Power Supply Current DDQQ DDQ I Power Down Current DDPD I Dynamic V ...

Page 11

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR LVEPECL (1) Symbol Parameter Input Characteristics I Input HIGH Current IH I Input LOW Current IL V Clamp Diode Voltage Input Voltage ...

Page 12

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR 2.5V LVTTL (1) Symbol Parameter Input Characteristics I Input HIGH Current IH I Input LOW Current IL V Clamp Diode Voltage Input ...

Page 13

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK POWER SUPPLY CHARACTERISTICS FOR 2.5V LVTTL OUTPUTS Symbol Parameter I Quiescent V Power Supply Current DDQ DD I Quiescent V Power Supply Current DDQQ DDQ I Power Down Current DDPD I Dynamic ...

Page 14

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR 1.8V LVTTL (1) Symbol Parameter Input Characteristics I Input HIGH Current IH I Input LOW Current IL V Clamp Diode Voltage Input ...

Page 15

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK POWER SUPPLY CHARACTERISTICS FOR 1.8V LVTTL OUTPUTS Symbol Parameter I Quiescent V Power Supply Current DDQ DD I Quiescent V Power Supply Current DDQQ DDQ I Power Down Current DDPD I Dynamic ...

Page 16

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter F VCO Frequency Range NOM t Reference Clock Pulse Width HIGH or LOW RPW t Feedback Input Pulse Width HIGH or LOW FPW t ...

Page 17

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK AC DIFFERENTIAL INPUT SPECIFICATIONS Symbol Parameter t Reference/Feedback Input Clock Pulse Width HIGH or LOW (HSTL/eHSTL outputs) W Reference/Feedback Input Clock Pulse Width HIGH or LOW (2.5V / 1.8V LVTTL outputs) HSTL/eHSTL/1.8V ...

Page 18

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK AC TIMING DIAGRAM (1) REF REF OTHER Q INVERTED Q Q DIVIDED DIVIDED BY 4 NOTE: 1. The AC TIMING DIAGRAM applies ...

Page 19

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK JITTER AND OFFSET TIMING WAVEFORMS [1:0] FB REF [1:0] REF [1: NOTE: 1. Diagram for and TxS/RxS = ...

Page 20

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK [1: [1:0] FB NOTE: 1. 1/fo = average period NOTE: 1. 1/fo = ...

Page 21

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK TEST CIRCUITS AND CONDITIONS Pulse Generator DIFFERENTIAL INPUT TEST CONDITIONS Symbol NOTE: 1. This input configuration is used for all input interfaces. For single-ended testing, the REF mode, the V 3 inch, ...

Page 22

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK V V DDQ DD REF [1:0] nQ [1:0] D.U.T. FB QFB QFB FB SW1 Test Circuit for Outputs OUTPUT TEST CONDITIONS Symbol V = 2.5V ± 0. Interface Specified ...

Page 23

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK RECOMMENDED LANDING PATTERN NOTE: All dimensions are in millimeters. INDUSTRIAL TEMPERATURE RANGE NL 68 pin 23 ...

Page 24

IDT5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK ORDERING INFORMATION IDT XXXXX XX Package Device Type CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X Package I -40°C to +85°C (Industrial) Plastic Ball Grid Array BB BGA ...

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