IDT74FCT88915TT70PY IDT, Integrated Device Technology Inc, IDT74FCT88915TT70PY Datasheet
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IDT74FCT88915TT70PY
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IDT74FCT88915TT70PY Summary of contents
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 133MHz • Pin and function compatible with MC88915 • Five non-inverting ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER PIN CONFIGURATIONS FEEDBK 5 REF_SEL 6 SYNC( (AN GND(AN) 11 SYNC( PLCC TOP VIEW PIN DESCRIPTION Pin Name I/O ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER ABSOLUTE MAXIMUM RATINGS Symbol Description V (2) Terminal Voltage with Respect to GND TERM V (3) Terminal Voltage with Respect to GND TERM T Operating Temperature A T Temperature Under Bias BIAS T ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER POWER SUPPLY CHARACTERISTICS Symbol Parameter ΔI Quiescent Power Supply Current CC TTL Inputs HIGH I Dynamic Power Supply CCD (4) Current C Power Dissipation Capacitance PD (5,6) I Total Power Supply Current C ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER SWITCHING CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter t Rise/Fall Time RISE/FALL All Outputs (between 0.2 V and 0 Rise/Fall Time RISE/FALL (3) 2Q Output (between 0.8V and 2.0V) t Output ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER GENERAL AC SPECIFICATION NOTES, CONTINUED 8. The wiring diagrams and written explanations of Figures 4a-4c demonstrate the input and output frequency relationships for various possible feedback configurations. The allowable SYNC input range to ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER μ μ 0.1 F Low High Freq. Freq. Bypass Bypass Figure 3. Recommended Loop Filter and Analog Isloation Scheme for the FCT88915TT NOTES: 1. Figure 3 shows a loop filter and ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER The frequency relationship shown here is applicable to all Q outputs (Q0, Q1, Q2, Q3 and Q4). 1:2 INPUT TO "Q" OUTPUT FREQUENCY RELATIONSHIP In this application, the Q/2 output is connected to ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER CLOCK @ f SYSTEM CLOCK SOURCE DISTRIBUTE CLOCK @ f CLOCK @ 2f at point of use Figure 5. Multiprocessing Application Using the FCT88915 for Frequency Multiplication FCT88915 SYSTEM LEVEL TESTING FUNCTIONALITY When ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER TEST CIRCUITS AND WAVEFORMS Pulse D.U.T. Generator R T Test Circuits For All Outputs SYNC IN PUT (SYNC (1) or SYNC (0)) FEED BACK INPUT Q/2 OUTPUT t ...
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IDT74FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER ORDERING INFORMATION IDT XX FCT XXXX Temp. Range Device Type NOTE: 1. When ordering GREEN packages, replace this numeric value with the equivalent letter below MHz B= 70 MHz C= 100 ...