MPC961CAC IDT, Integrated Device Technology Inc, MPC961CAC Datasheet - Page 7

• Manufacturer Part Number: MPC961CAC
• Description: IC BUFFER ZD 1:18 PLL 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr

Specifications of MPC961CAC

• Pll: Yes
• Input: LVCMOS
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:17
• Differential - Input:output: No/No
• Frequency - Max: 200MHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MPC961C Data Sheet
Table 8. Confidence Factor CF
can be used to fine-tune the effective delay through each device. In
the following example calculation a
I/O jitter confidence factor of 99.7% (± 3σ) is assumed, resulting in
a worst case timing uncertainty from input to any output of -275 ps
to 315 ps relative to CCLK:
used for a more precise timing performance analysis.
Power Consumption of the MPC961C and Thermal
Management
operating frequency range up to 200 MHz. The MPC961C power
consumption and the associated long-term reliability may decrease
the maximum frequency limit, depending on operating conditions
such as clock frequency, supply voltage, output loading, ambient
MPC961C REVISION 5 AUGUST 17, 2009
P
P
T
f
CLOCK,MAX =
J
TOT
TOT
The feedback trace delay is determined by the board layout and
Due to the frequency dependence of the I/O jitter,
The MPC961C AC specification is guaranteed for the entire
± 1σ
± 2σ
± 3σ
± 4σ
± 5σ
± 6σ
t
t
= T
CF
SK(PP)
SK(PP)
=
= V
A
[
+ P
18
16
14
12
10
I
CC
8
6
4
2
0
= [-80ps...120ps] + [-150ps...150ps] +
= [-275ps...315ps] + t
CCQ
Figure 8. Max. I/O Jitter versus Frequency
50
TOT
Probability of clock edge within the distribution
[(15ps @ -3)...(15ps @ 3)] + t
·
F_RANGE = 1
[
C
+ V
I
· R
70
PD
CCQ
CC
thja
· N · V
+ V
1
90
· f
CLOCK
CC
2
110
CC
· f
CLOCK
0.68268948
0.95449988
0.99730007
0.99993663
0.99999943
0.99999999
·
·
(
PD, LINE(FB)
[
130
N · C
F_RANGE = 0
T
Clock frequency [MHz]
·
150
j,MAX
(
PD
N · C
R
thja
PD, LINE(FB)
+
170
– T
Σ
M
PD
C
A
L
+
190
)
Σ
M
]
– (I
Figure 8
C
· V
L
CCQ
CC
)
]
+
· V
can be
Σ
P
CC
[
DC
)
]
Q
· I
7
OH
temperature, vertical convection and thermal conductivity of
package and board. This section describes the impact of these
parameters on the junction temperature and gives a guideline to
estimate the MPC961C die junction temperature and the associated
device reliability. For a complete analysis of power consumption as
a function of operating conditions and associated long term device
reliability refer to the Application Note AN1545. According the
AN1545, the long-term device reliability is a function of the die
junction temperature:
Table 9. Die Junction Temperature and MTBF
temperature and impact the device reliability (MTBF). According to
the system-defined tolerable MTBF, the die junction temperature of
the MPC961C needs to be controlled and the thermal impedance of
the board/package should be optimized. The power dissipated in the
MPC961C is represented in equation 1.
C
represents the external capacitive output load, N is the number of
active outputs (N is always 27 in case of the MPC961C). The
MPC961C supports driving transmission lines to maintain high
signal integrity and tight timing parameters. Any transmission line
will hide the lumped capacitive load at the end of the board trace,
therefore,
can be eliminated from equation 1. Using parallel termination output
termination results in equation 2 for power dissipation.
or thevenin termination, V
output termination technique and DC
If transmission lines are used
eliminated. In general, the use of controlled transmission line
techniques eliminates the impact of the lumped capacitive loads at
the end lines and greatly reduces the power dissipation of the
device. Equation 3 describes the die junction temperature T
function of the power consumption.
PD
· (V
Increased power consumption will increase the die junction
Where I
In equation 2, P stands for the number of outputs with a parallel
Junction Temperature (°C)
is the power dissipation capacitance per output,
CC
– V
Σ
CCQ
C
OH
L
) + (1 – DC
100
110
120
130
is zero for controlled transmission line systems and
is the static current consumption of the MPC961C,
OL
Q
) · I
, I
OL
Σ
OL
C
, V
©2009 Integrated Device Technology, Inc.
L
LOW VOLTAGE ZERO DELAY BUFFER
· V
is zero in equation 2 and can be
OH
OL
Q
, and I
is the clock signal duty cycle.
]
MTBF (Years)
Equation 1
Equation 2
Equation 3
Equation 4
OH
20.4
9.1
4.2
2.0
are a function of the
(Μ)Σ
C
J
L
as a