MPC9608AC IDT, Integrated Device Technology Inc, MPC9608AC Datasheet - Page 5

• Manufacturer Part Number: MPC9608AC
• Description: IC CLOCK BUFFER ZD 1:10 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr

Specifications of MPC9608AC

• Pll: Yes with Bypass
• Input: LVCMOS
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:10
• Differential - Input:output: No/No
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT™ 1:10 LVCMOS Zero Delay Clock Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9608
1:10 LVCMOS Zero Delay Clock Buffer
MPC9608
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. PLL mode requires PLL_EN = 0 to enable the PLL and zero-delay operation.
3. In bypass mode, the MPC9608 divides the input reference clock.
4. Applies for bank A and for bank B if BSEL = 0. If BSEL = 1, the minimum and maximum output frequency of bank B is divided by two.
5. Calculation of reference duty cycle limits: DC
6. -3 dB point of PLL transfer characteristics.
478
Table 7. AC Characteristics (V
Symbol
t
t
t
t
t
PW, MIN
JIT(PER)
PLZ, HZ
PZL, LZ
t
JIT(CC)
t
f
t
JIT(∅)
LOCK
REF
f
f
SK(o)
t
t
BW
t
DC
REF
max
r
(∅)
r
, t
, t
f
f
= 100 MHz the input duty cycle range is 20% < DC < 80%.
Input reference frequency in PLL mode
Input reference frequency in PLL bypass mode
Output Frequency
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Propagation Delay (SPO) CCLK to FB_IN
Output-to-Output Skew
Output Duty Cycle
Output Rise/Fall Time
Output Disable Time
Output Enable Time
Cycle-to-cycle Jitter
Period Jitter
I/O Phase Jitter
PLL closed loop bandwidth
Maximum PLL Lock Time
4
Characteristics
CC
= 3.3 V ± 5%, T
6
5
f
REF
f
REF
All outputs, including QFB
REF, MIN
= 12.5 MHz to 100 MHz
= 100 MHz and above
2
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
RMS (1 σ)
F_RANGE = 00
F_RANGE = 01
F_RANGE = 10
F_RANGE = 11
= t
A
PW,MIN
Within a bank
Bank-to-bank
= -40° to 85°C)
3
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
* f
REF
TT
.
*100% and DC
5
-1.75% of t
1
-175
12.5
12.5
Min
100
100
2.0
0.1
50
25
50
25
45
0
PER
REF,MAX
0.5 – 1.3
7 – 15
2 – 7
1 – 3
Typ
50
10
= 100% – DC
+1.75% of t
+175
Max
200
100
200
200
100
100
150
150
150
125
1.0
1.0
50
25
50
25
80
55
10
10
REF,MIN
PER
. For example, at
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ms
ns
ns
ps
ps
ps
ns
ns
ns
ps
ps
ps
%
BSEL = 0
BSEL = 0
BSEL = 0
BSEL = 0
0.8 V to 2.0 V
PLL Locked
0.55 V to 2.4 V
BSEL = 0
BSEL = 0
BSEL = 0
Condition
NETCOM
MPC9608