ICS87321AMI IDT, Integrated Device Technology Inc, ICS87321AMI Datasheet
ICS87321AMI
Specifications of ICS87321AMI
800-1201-5
800-1201
87321AMI
Related parts for ICS87321AMI
ICS87321AMI Summary of contents
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... Full 3.3V or 2.5V operating supply • -40°C to 85°C ambient operating temperature • Available in both standard (RoHS 5) and lead-free (RoHS 6) packages SSIGNMENT CLK 1 8 nCLK F_SEL 4 5 ICS87321I 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View 1 ICS87321AMI REV. A APRIL 7, 2009 ICS87321I Vcc ...
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... ICS87321I ÷1, ÷2 DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS ABLE UNCTION ABLE ÷ IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR ÷ ICS87321AMI REV. A APRIL 7, 2009 ...
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... Exposure to absolute maximum rating conditions for ex- 95°C/W (0 lfpm) tended periods may affect product reliability 3.3V±5 0V 2.5V±5 0V 3.3V±5% 2.5V±5 3.3V±5% 2.5V±5 -40°C 85° -40°C 85° 0V -40°C 85° 0V -40°C 85° ICS87321AMI REV. A APRIL 7, 2009 µ A µ µ A µ A µ A µ ...
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... DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR T 4E. LVPECL DC C ABLE HARACTERISTICS 4E. LVPECL DC C ABLE HARACTERISTICS 5A 3.3V±5%, V ABLE HARACTERISTICS IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR , V = 3.3V±5 0V -40° 2.5V±5 0V -40° 0V -40°C 85° 85° 85° ICS87321AMI REV. A APRIL 7, 2009 ...
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... ICS87321I ÷1, ÷2 DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR T 5B 2.5V±5%, V ABLE HARACTERISTICS IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR = 0V -40°C 85° ICS87321AMI REV. A APRIL 7, 2009 ...
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... FFSET ROM ARRIER REQUENCY device. This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependent on the input source and measurement equipment. 6 Additive Phase Jitter @ ) Z ICS87321AMI REV. A APRIL 7, 2009 ...
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... ICS ™ 3.3V LVPECL CLOCK GENERATOR M I EASUREMENT 2V SCOPE LVPECL nQx V EE -0.5V ± 0.125V 2.5V O UTPUT PART 1 nQx Qx PART 2 nQy V CMR ART TO ART nCLK 80% CLK 20 ROPAGATION 7 NFORMATION SCOPE Qx nQx OAD EST IRCUIT tsk(pp) S KEW ELAY ICS87321AMI REV. A APRIL 7, 2009 ...
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... For example, if the input CC clock swing is only 2.5V and V and R2/R1 = 0.609. VCC R1 1K Single Ended Clock Input V_REF C1 0. INGLE NDED IGNAL RIVING 8 , CONTINUED = 3.3V, V_REF should be 1.25V CC CLK nCLK D I IFFERENTIAL NPUT ICS87321AMI REV. A APRIL 7, 2009 ...
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... HiPerClockS Input NPUT RIVEN OUPLE 9 3. Ohm CLK Ohm nCLK HiPerClockS LVPECL Input 2B CLK/nCLK LOCK NPUT 3.3V LVPECL D RIVER Ohm LVDS_Driv er R1 100 Ohm 2D CLK/nCLK LOCK NPUT 3.3V LVDS D RIVER ICS87321AMI REV. A APRIL 7, 2009 D RIVEN BY 3.3V CLK nCLK Receiv er D RIVEN BY ...
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... Other suitable clock layouts may exist and it would be recommended that the board design- ers simulate to guarantee compatibility across all printed circuit and clock component process variations. FIN FOUT RTT T F ERMINATION 10 3.3V 125 125 FIN 3B. LVPECL O T IGURE UTPUT ERMINATION ICS87321AMI REV. A APRIL 7, 2009 ...
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... ICS ™ 3.3V LVPECL CLOCK GENERATOR UTPUTS level. The R3 in Figure 4B can be eliminated and the termination is shown in Figure 4C. 2.5V VCCO=2.5V R3 250 + - 2,5V LVPECL Driv ERMINATION XAMPLE IGURE 2. XAMPLE Ohm Ohm 4B. 2.5V LVPECL D T RIVER ERMINATION ICS87321AMI REV. A APRIL 7, 2009 2. XAMPLE ...
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... P C OWER ONSIDERATIONS = 3.465V, which gives worst case results 3.465V * 18mA = 62.37mW TM devices is 125°C. * Pd_total + SOIC PIN ORCED ONVECTION by Velocity (Linear Feet per Minute 95.0°C/W 12 must be used. Assuming no air JA 200 500 88.4°C/W 83.7°C/W ICS87321AMI REV. A APRIL 7, 2009 ...
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... LVPECL CLOCK GENERATOR LVPECL D C IGURE RIVER IRCUIT AND – 0.9V CC_MAX – 1. – [(2V – (V – V OH_MAX CC _MAX OH_MAX )) /R – [(2V – (V – V OL_MAX CC _MAX OL_MAX OUT ERMINATION load, and a termination ] * (V – CC_MAX OH_MAX – CC_MAX OL_MAX ICS87321AMI REV. A APRIL 7, 2009 ...
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... Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS87321I is: 309 IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR R I ELIABILITY NFORMATION 8 L SOIC EAD by Velocity (Linear Feet per Minute 95.0°C/W 14 200 500 88.4°C/W 83.7°C/W ICS87321AMI REV. A APRIL 7, 2009 ...
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... ICS87321I ÷1, ÷2 DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR ACKAGE UTLINE UFFIX FOR IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR SOIC EAD ABLE ACKAGE IMENSIONS ° 0 Reference Document: JEDEC Publication 95, MS-012 ° 8 ICS87321AMI REV. A APRIL 7, 2009 ...
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... IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT ™ / ICS ™ 3.3V LVPECL CLOCK GENERATOR " " " " " " ° & ° ° & ° ICS87321AMI REV. A APRIL 7, 2009 ° ° ° ° ...
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ICS87321I ÷1, ÷2 DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject ...