MB88151APNF-G-100-JNE1 Fujitsu Semiconductor America Inc, MB88151APNF-G-100-JNE1 Datasheet - Page 4

IC SSCG EMI RED 8-SOIC

MB88151APNF-G-100-JNE1

Manufacturer Part Number
MB88151APNF-G-100-JNE1
Description
IC SSCG EMI RED 8-SOIC
Manufacturer
Fujitsu Semiconductor America Inc
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet

Specifications of MB88151APNF-G-100-JNE1

Pll
Yes
Input
CMOS
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
33.4MHz
Divider/multiplier
No/Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
33.4MHz
For Use With
865-1032 - BOARD EVALUATION FOR MB88151
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1039
MB88151A
4
■ HANDLING DEVICES
Preventing Latch-up
Handling unused pins
The attention when the external clock is used
Power supply pins
Oscillation circuit
A latch-up can occur if, on this device, (a) a voltage higher than V
input or output pin or (b) a voltage higher than the rating is applied between V
if it occurs, significantly increases the power supply current and may cause thermal destruction of an element.
When you use this device, be very careful not to exceed the maximum rating.
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
Unused output pin should be opened.
Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.
Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.
Please design connecting the power supply pin of this device by as low impedance as possible from the current
supply source.
We recommend connecting electrolytic capacitor (about 10 µF) and the ceramic capacitor (about 0.01 µF) in
parallel between V
Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that
electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring.
Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
SS
pin and V
DD
pin near the device, as a bypass capacitor.
DD
or a voltage lower than V
DD
pin and V
SS
SS
pin. The latch-up,
DS04-29127-2E
is applied to an

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