MB88151APNF-G-100-JNE1 Fujitsu Semiconductor America Inc, MB88151APNF-G-100-JNE1 Datasheet - Page 15

• Manufacturer Part Number: MB88151APNF-G-100-JNE1
• Description: IC SSCG EMI RED 8-SOIC
• Manufacturer: Fujitsu Semiconductor America Inc
• Type: Fanout Distribution, Spread Spectrum Clock Generatorr

Specifications of MB88151APNF-G-100-JNE1

• Pll: Yes
• Input: CMOS
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 33.4MHz
• Divider/multiplier: No/Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 33.4MHz
• For Use With: 865-1032 - BOARD EVALUATION FOR MB88151
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1039

■ LOCK-UP TIME
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock
signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “t
For the input clock stabilization time, check the characteristics of the resonator or oscillator used.
For modulation enable control using the ENS pin during normal operation, the set clock signal is output from
CKOUT pin at most the lock-up time (t
Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output
DS04-29127-2E
clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-
cycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset
of the device at the succeeding stage after the lock-up time.
XIN
ENS
CKOUT
V
XIN
Setting pin
SEL0,
SEL1,
ENS
CKOUT
DD
V
IH
(lock-up time )
3.0 V
V
IH
LK
t
LK
) after the level at the ENS pin is determined.
stabilization wait time
Internal clock
(lock-up time )
t
V
LK
IL
(lock-up time )
t
LK
MB88151A
LK
”).
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