ADF4112BRUZ Analog Devices Inc, ADF4112BRUZ Datasheet - Page 25

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ADF4112BRUZ

Manufacturer Part Number
ADF4112BRUZ
Description
IC SYNTH PLL RF 3.0GHZ 16-TSSOP
Manufacturer
Analog Devices Inc
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of ADF4112BRUZ

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
3GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
3GHz
Pll Type
Frequency Synthesis
Frequency
3GHz
Supply Current
6.5mA
Supply Voltage Range
2.7V To 5.5V
Digital Ic Case Style
TSSOP
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF4112EBZ1 - BOARD EVAL FOR ADF4112EVAL-ADF411XEBZ1 - BOARD EVAL FOR ADF411X NO CHIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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DIRECT CONVERSION MODULATOR
In some applications, a direct conversion architecture can be
used in base station transmitters. Figure 37 shows the combina-
tion available from ADI to implement this solution.
The circuit diagram shows the AD9761 being used with the
AD8346. The use of dual integrated DACs such as the AD9761
with specified ±0.02 dB and ±0.004 dB gain and offset matching
characteristics ensures minimum error contribution (over
temperature) from this portion of the signal chain.
The local oscillator (LO) is implemented using the ADF4113. In
this case, the OSC 3B1-13M0 provides the stable 13 MHz
reference frequency. The system is designed for a 200 kHz
channel spacing and an output center frequency of 1960 MHz.
The target application is a WCDMA base station transmitter.
OSC 3B1-13M0
MODULATED
TCXO
INTERFACE
DIGITAL
DIGITAL
SERIAL
DATA
100pF
2k Ω
REFIO
FS ADJ
REF
RF
AD9761
TxDAC
ADF4113
IN
IN
B
R
SET
QOUTB
QOUTA
RF
IOUTB
IOUTA
4.7kΩ
IN
CP
A
51 Ω
100pF
POWER SUPPLY CONNECTIONS AND DECOUPLING CAPACITORS
ARE OMITTED FROM DIAGRAM TO INCREASE CLARITY.
910pF
Figure 37. Direct Conversion Transmitter Solution
3.9kΩ
9.1nF
3.3kΩ
Rev. C | Page 25 of 28
620pF
LOW-PASS
LOW-PASS
FILTER
FILTER
VCO190-1960T
Typical phase noise performance from this LO is −85 dBc/Hz at
a 1 kHz offset.
The LO port of the AD8346 is driven in single-ended fashion.
LOIN is ac-coupled to ground with the 100 pF capacitor; LOIP
is driven through the ac coupling capacitor from a 50 Ω source.
An LO drive level of between −6 dBm and −12 dBm is required.
The circuit of Figure 37 gives a typical level of −8 dBm.
The RF output is designed to drive a 50 Ω load but must be ac-
coupled as shown in Figure 37. If the I and Q inputs are driven
in quadrature by 2 V p-p signals, the resulting output power is
around −10 dBm.
ADF4110/ADF4111/ADF4112/ADF4113
100pF
IBBP
IBBN
QBBP
QBBN
100pF
LOIN
AD8346
18Ω
LOIP
18Ω
18Ω
100pF
VOUT
100pF
RF
OUT

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