ICS8534AY-01LFT IDT, Integrated Device Technology Inc, ICS8534AY-01LFT Datasheet - Page 20

• Manufacturer Part Number: ICS8534AY-01LFT
• Description: IC FANOUT BUFFER 1-22 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of ICS8534AY-01LFT

• Number Of Circuits: 1
• Ratio - Input:output: 2:22
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 500MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Frequency-max: 500MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 500MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP EP
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8534AY-01LFT

ICS8534-01 Data Sheet
Revision History Sheet
ICS8534AY-01 REVISION B MARCH 28, 2011
Rev
A
A
A
B
Table
T4C
T9
T1
T6
Page
15
12
13
18
10
11
12
1
1
1
2
5
6
Description of Change
Updated Package Outline and Package Dimensions.
Features Section - added lead-free bullet.
Added Recommendations for Unused Input and Output Pins section.
Updated EPad Thermal Release Path section.
Ordering Information Table. Added lead-free part number, marking and note.
Updated format throughout the datasheet.
Pin Assignment - rotated pin orientation 90° back to original orientation,
(datasheet publication dated December 6, 2007).
Features section, change Additive Phase Jitter spec to 0.15ps typical.
Pin Description Table - corrected nQ0, Q0 numbering to 62, 63.
LVPECL DC Characteristics Table - corrected notes.
AC Characteristics Table - corrected Additive Phase Jitter spec to 0.15ps typical.
Updated Wiring the Differential Input to Accept Single-ended Levels application
note.
Corrected Differential Clock Input Interface Application note.
Corrected LVPECL Clock Input Interface Application note.
Updated to new header/footer format.
20
LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
©2011 Integrated Device Technology, Inc.
11/19/04
12/06/07
5/09/08
3/28/11
Date