ICS8534AY-01LF IDT, Integrated Device Technology Inc, ICS8534AY-01LF Datasheet
ICS8534AY-01LF
Specifications of ICS8534AY-01LF
8534AY-01LF
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ICS8534AY-01LF Summary of contents
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... Pulldown PCLK 1 Pullup/Pulldown LE nPCLK Pullup OE D ICS8534AY-01 REVISION B MARCH 28, 2011 Features • Twenty-two differential LVPECL outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • ...
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... Q1 Output 62, 63 nQ0, Q0 Output NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER Type Description Output supply pins for LVPECL outputs. No connect. Core supply pin for LVPECL outputs. ...
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... LOW 0 1 LOW 1 0 CLK 1 1 PCLK nCLK, nPCLK CLK, PCLK OE nQ0:nQ21 Q0:Q21 Figure 1. OE Timing Diagram ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER Test Conditions Outputs nQ0:nQ21 HIGH HIGH nCLK nPCLK Disabled 3 Minimum Typical Maximum 4 37 ...
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... Input High Voltage IH V Input Low Voltage IL I Input High Current OE, CLK_SEL IH I Input Low Current OE, CLK_SEL IL ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER Rating 4.6V -0. 0.5V CC 50mA 100mA 22.3°C/W (0 lfpm) -65°C to 150° 3.3V ± 5%, V ...
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... Common Mode Input Voltage; NOTE 1 CMR V Output High Voltage; NOTE Output Low Voltage; NOTE Peak-to-Peak Output Voltage Swing SWING NOTE 1: Common mode input voltage is defined as V Ω NOTE 2: Outputs terminated with 50 ICS8534AY-01 REVISION B MARCH 28, 2011 = V = 3.3V ± 5 CCO Test Conditions CLK 3.465V CC IN nCLK ...
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... NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions at the same temperature. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 5: Driving only one input clock. ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER = 0V 0° ...
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... This is illustrated above. The device meets the noise floor of what is ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER of the power in the 1Hz band to the power in the fundamental. When the required offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the fundamental ...
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... Par t 2 nQy Qy tsk(pp) Part-to-Part Skew nCLK, nPCLK CLK, PCLK nQ0:nQ21 Q0:Q21 t PD Propagation Delay ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER SCOPE nCLK, nPCLK Qx CLK, PCLK nQx Differential Input Level nQx Qx nQy Qy Output Skew Clock Outputs ...
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... LVCMOS Control Pins All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1kΩ resistor can be used. ICS8534AY-01 REVISION B MARCH 28, 2011 PW x 100% Outputs: LVPECL Outputs All unused LVPECL outputs can be left floating. We recommend that there is no trace attached ...
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... This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission Figure 2. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels ICS8534AY-01 REVISION B MARCH 28, 2011 line impedance. For most 50Ω applications, R3 and R4 can be 100Ω ...
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... HCSL *Optional – R3 and R4 can be 0Ω Figure 3E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS8534AY-01 REVISION B MARCH 28, 2011 types. The input interfaces suggested here are examples only. If the and V must meet the V driver is from another vendor, use their termination recommendation. ...
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... Zo = 60Ω 60Ω SSTL R1 120Ω Figure 4E. PCLK/nPCLK Input Driven by an SSTL Driver ICS8534AY-01 REVISION B MARCH 28, 2011 The input interfaces suggested here are examples only. If the driver must meet the V and is from another vendor, use their termination recommendation Please consult with the vendor of the driver component to confirm the driver termination requirements ...
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... Figure 5A. 3.3V LVPECL Output Termination ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 5A and 5B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may ...
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... SOLDER PIN PAD Figure 6. Assembly for Exposed Pad Thermal Release Path - Side View (drawing not to scale) ICS8534AY-01 REVISION B MARCH 28, 2011 and dependent upon the package power dissipation as well as electrical conductivity requirements. Thus, thermal and electrical analysis and/or testing are recommended to determine the minimum number needed ...
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... This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of board (multi-layer). θ Table 6. Thermal Resistance JA Linear Feet per Minute Multi-Layer PCB, JEDEC Standard Test Boards ICS8534AY-01 REVISION B MARCH 28, 2011 = 3.465V, which gives worst case results 3.465V * 230mA = 796.95mW EE_MAX * Pd_total + T ...
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... CCO_MAX [(2V – 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V – (V – 2V))/R OL_MAX CCO_MAX [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER V OUT RL 50Ω CCO = V – ...
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... Air Flow Table for a 64 Lead TQFP, E-Pad JA Linear Feet per Minute Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8534-01 is: 1474 ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER θ vs. Air Flow JA 0 200 22.3° ...
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... Ref. D3 & E3 4.5 5.0 e 0.50 Basic L 0.45 0.60 θ 0° ccc Reference Document: JEDEC Publication 95, MS-026 ICS8534AY-01 REVISION B MARCH 28, 2011 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER -HD VERSION EXPOSED PAD DOWN Maximum 1.20 0.15 1.05 0.27 0.20 5.5 0.75 7° ...
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... ICS8534AY-01LF 8534AY-01LFT ICS8534AY-01LF NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...
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... ICS8534AY-01 REVISION B MARCH 28, 2011 Description of Change Updated Package Outline and Package Dimensions. Features Section - added lead-free bullet. Added Recommendations for Unused Input and Output Pins section. Updated EPad Thermal Release Path section. Ordering Information Table. Added lead-free part number, marking and note. ...
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ICS8534-01 Data Sheet We’ve Got Your Timing Solution 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to ...